Quantum Bits: IBM Tackles Noisy Machines; IonQ Issues Benchmarks; D-Wave Expands Leap

By John Russell

March 27, 2019

Keeping up with quantum computing announcements is increasingly challenging. Today, IBM issued a paper outlining a technique for error mitigation in today’s noisy QCs. Last week IonQ posted a paper benchmarking its ion trap system and declared, “our system outperforms all other currently available hardware” while a Microsoft-led group announced formation of the Northwest Quantum Nexus. Yesterday D-Wave Systems announced expansion of its web portal Leap during its User Meeting (Qubits Europe 2019, Milan) which includes industry heavyweights such as BMW, G.E. Research, and Volkswagen.

Widespread use of practical quantum computing may be years away, but the vanguard is pushing steadily forward. Here are bullets for five recent quantum announcements with a bit more information on a few them below:

  • IBM keeps chipping away at obstacles stalling real-world use of the current crop of noisy intermediate scale quantum computers. Its paper (Error mitigation extends the computational reach of a noisy quantum processor) claims the protocol IBM developed “will enable substantial improvements in the capabilities of near-term quantum computing hardware.” In this instance two or more wrongs can help equal a right. More below.
  • IonQ edges into early benchmark skirmishes. In its paper (Benchmarking an 11-qubit quantum computer) the company says its ion trap-based system achieved, “average single-qubit gate fidelities of 99.5%, [and] average two-qubit-gate fidelities of 97.5%.” IonQ contends the algorithms it used “serve as excellent benchmarks for any type of quantum hardware.” Recall that IBM touted Quantum Volume as its favored metric of choice just three weeks ago.
  • Microsoft, PNNL, and UWashington Join Forces. Last week, this trio announced formation of the Northwest Quantum Nexus, “a coalition of research and industrial organizations in the Pacific Northwest and neighboring regions with the goal of advancing Quantum Information Sciences (QIS) research and developing a QIS-trained workforce.”
  • D-Wave Systems reports “33 new countries includ[ing] all 28 member states of the European Union, Japan, Iceland, Liechtenstein, Norway, and Switzerland” now have access to Leap, which D-Wave characterizes as “the only cloud-based service to provide real-time access to a live quantum computer, as well as open-source development tools, interactive demos, educational resources.”
  • Accredited Standards Committee X9, long-time tracker and standards association for the financial industry, issued two reports, a white paper (X9 Report Quantum Computing Risks to the Financial Services Industry) examining risks posed by QC and a technical report (X9 Technical Report TR-50 – Quantum Techniques in Cryptographic Message Syntax).

IonQ Charges into Quantum Race

Let’s start with IonQ, perhaps lesser known than quantum efforts by IBM, Microsoft, and D-Wave. It was founded in 2016 by a pair of distinguished quantum computing researchers – Chris Monroe (University of Maryland and Joint Quantum Institute) and Jungsang Kim (Duke University) – to take ion trap quantum computing from the lab to market. Monroe (CEO) and Kim (CSO) are leveraging technology they helped developed and have licensed from UM and Duke.

Most of us are more familiar with semiconductor-based quantum computing technology which dominates the quantum computing landscape. Ion trap technology has also been around for a long time and NIST (National Institute of Standards and Technology) has long experimented with it, not least for use in atomic clocks. The ion traps used in quantum computing are not so different from the ion traps used in spectrometry. Broadly, the technology involves trapping ions in an electromagnetic field and using them as qubits. While “gate switching” times are slower than semiconductor approaches, memory times are superior using ions traps.

Here’s a bit more on how the IonQ system works: “Our qubit register is comprised of a chain of trapped 171Yb+ ions, spatially confined near a microfabricated surface electrode trap. For this work, we load 13 ions, the middle 11 of which are used as qubits. The two end ions allow for a more uniform spacing of the central 11 ions. The ions are laser-cooled close to their motional ground state using a combination of Doppler and resolved sideband cooling. We encode quantum information into the hyperfine sublevels…At the beginning of each computation, each qubit is initialized to |0⟩via optical pumping with high accuracy. After qubit operations (described below), we read out the state of all of the qubits simultaneously by directing laser light resonant with the 2S1/2 |F = 1⟩to 2P1/2 transition, imaging each ion onto a detector and thresholding the photon counts to determine if each qubit was in the |1⟩(spin up) or |0⟩(spin down) state.” (See figure on right, click to enlarge.)

Monroe commented in the announcement, “The real test of any computer is what can it do in a real-world setting. We challenged our machine with tough versions of two well-known algorithms that demonstrate the advantages of quantum computing over conventional devices. The IonQ quantum computer proved it could handle them. Practical benchmarks like these are what we need to see throughout the industry.”

This is excerpted from the abstract on the benchmark performance:

“To illustrate the capabilities of this universal platform and provide a basis for comparison with similarly-sized devices, we compile the Bernstein-Vazirani (BV) and Hidden Shift (HS) algorithms into our native gates and execute them on the hardware with average success rates of 78% and 35%, respectively. These algorithms serve as excellent benchmarks for any type of quantum hardware, and show that our system outperforms all other currently available hardware.”

The Bernstein-Vazirani and Hidden Shift algorithms used in this experiment instruct a computer to find a hidden number out of a set of possible numbers. The company reported, “IonQ has solved for all possible 1024 hidden numbers with their 11-qubit machine, a more difficult task than has been attempted before on a quantum computer. Each test is based on a formula that a conventional computer can only solve by brute force…Quantum computers, in theory, can find these solutions in a single calculation by measuring all possible outputs simultaneously.”

It will be interesting to watch how ion trap quantum computing advances. Last August, NSF launched an ambitious program, Software Tailored Architecture for Quantum Design (STAQ), whose goal is to build a 64-bit ion trap QC and associated software stack capable of tackling problems classical computers struggle with. (For more information see HPCwire article, STAQ(ing) the Quantum Computing Deck)

IBM – Two Wrongs Make a Right…Sort of

IBM’s recent work tackles one of the thorniest problems in quantum computing, error correction, or in this case error mitigation. IBM has come up with a workaround that shows promise and is presented in a paper published today in Nature (Error mitigation extends the computational reach of a noisy quantum processor) and discussed in an IBM blog by Jay Gambetta, IBM Fellow, and Abhinav Kandala, research staff member, who describe the problem very well.

“Even at the extreme cold temperatures of a dilution refrigerator where the quantum processors operate, our physical computing elements, superconducting qubits, have coherence times on the order of a few hundred microseconds at best, which sets the timescales over which quantum information is lost,” they write. “While a major challenge to advancing quantum computers today involves increasing these qubit coherence times, the end goal is to build a fully fault tolerant quantum computer capable of detecting and correcting errors. However, these architectures are likely several years away.”

IBM takes a perhaps counterintuitive approach in which two wrong answers – actually many wrong answers – can act as a guide to the correct answer. “We show that repeating the computation at varying levels of noise lets us estimate what the quantum computer would calculate in the absence of noise. To do this involves a bit of a “stretch” – the microwave pulses used to perform quantum operations on the qubits are stretched in time in order to controllably amplify the noise. The error mitigation technique dubbed “zero-noise extrapolation”, is readily accessible for existing quantum computers since it doesn’t require any additional hardware modifications,” write Gambetta and Kandala. (See figure from IBM paper below, click to enlarge.)

The approach, say IBM researchers, may enable tackling longer more complicated problems as well as being a general purpose technique.

“Computations on noisy quantum hardware are limited by the competition between decoherence and circuit depth, a measure of the number of sequential operations performed on the processor. Increasing circuit depth can help create more complex quantum states, and in the context of chemistry simulation, this may allow for a better representation of the energy states of the molecules considered. However, increasing circuit depth on a noisy quantum computer typically implies increased errors from decoherence. [W]ith the technique developed in this work, our ability to mitigate the effect of decoherence enables us to access more complex and accurate computations that benefit from increased circuit depth.”

While the new protocol enabled computational accuracies that were otherwise inaccessible to the hardware, the authors caution that it is important to recognize that the improvements are not indefinite and are ultimately limited by the coherence properties of the processor. “As we march towards systems with increasing Quantum Volume, improved coherence, quantum control, and circuit compilation will all contribute to extending the reach to even longer quantum circuits with more qubits,” they write.

D-Wave: It’s All About the Applications

D-Wave remains the only provider of commercially available quantum computers even though they remain research (not production) machines. Its technology – adiabatic annealing – is quite different from universal gate-based models. That said most QC watchers now agree D-wave’s approach is a solid contender for solving classes of optimization problems. Recently, the company unveiled an 18-month roadmap that includes creating a 5000-qubit system (see HPCwire article, D-Wave Previews Next-Gen Platform; Debuts Pegasus Topology; Targets 5000 Qubits).

The emphasis at this week’s D-Wave’s user meeting is on showcasing progress towards real-world applications. D-Wave says “customers have built over 150 early applications on D-Wave computers to date” and lists the following highlight topics from the conference:

  • Quantum computing algorithms for optimized planning and scheduling
  • Building a hybrid algorithm that will be used as part of a smart mobility solution
  • Inferring correlation between future stock returns and their features
  • Applications of quantum annealing for blockchain and allocation of television 
  • Quantum annealing–based optimizations of robotic movement in manufacturing
  • Optimizing flight gate assignment
  • Capacitated vehicle routing
  • Quantum chemistry calculations
  • Quantitative financial reverse stress testing

“The future of practical quantum computing relies on giving more developers and researchers the access and tools they need to build quantum applications. Expanding Leap globally and bringing customers from around the world together to share their work is critically important to realizing that vision,” said Vern Brownell, CEO of D-Wave in the official announcement. “I’ve never been more confident that true practical quantum applications are within reach in the near future. The range and robustness of early applications from our customers continues to grow, and customers are starting to see early value in using quantum computing to address real-world business problems.”

Northwest Quantum Nexus Sets Aggressive Agenda

Obviously these are early days but the newly-announced Northwest Quantum Nexus is quickly moving to establish directions. At a two-day summit last week announcing NQN, the group issued the following statement:

“In line with the goals of the National Quantum Initiative Act, the Northwest Quantum Nexus accelerates Quantum Information Science (QIS) to develop a quantum economy and workforce in the greater Pacific Northwest region of the United States and Canada. The high concentration of quantum activity in the Northwest makes it one of the top regions globally to address key QIS needs. The goal of the two-day Summit this week is to bring together the region’s experts who can define the region’s potential to drive quantum computing’s future.

Its objectives include:

  • Bringing together academia, government, startups, and industry to pursue multi-disciplinary QIS research to deliver scalable quantum computing.
  • Pursuing quantum computing via collaborative research and development, targeted quantum algorithms and programming, and the development of quantum materials.
  • Capitalizing on public-private partnerships to promote a rapid exchange of knowledge and resources and drive discoveries in quantum technologies.
  • Applying research outcomes to application areas and testbeds, including clean energy and sustainability.
  • Cultivating the future quantum workforce through programs that range from early to higher education and professional levels, as well as the corresponding network of institutions and outlets offering curriculum and training opportunities.”

Todd Holmdahl, corporate VP of Microsoft Quantum, said “The Northwest Quantum Nexus represents another big step toward the development of scalable, stable quantum computers. The partnership just makes a lot of sense – we’re already one of the top regions in the world for quantum research, and the Nexus will help us leverage that expertise to build a quantum-ready workforce and boost the region and nation’s quantum ecosystem.”

Feature illustration caption: Single qubit trajectories measured at different noise levels (red, green) are used to estimate the error-mitigated trajectory (blue). Source: IBM

Link to IonQ paper: https://arxiv.org/pdf/1903.08181.pdf

Link to IonQ announcement: https://ionq.co/news/march-21-2019-new-benchmarks

Link to IBM paper: https://www.nature.com/articles/s41586-019-1040-7

Link to IBM blog: https://www.ibm.com/blogs/research/2019/03/noise-amplification-quantum-processors

Link to D-Wave announcements: https://www.dwavesys.com/press-releases/d-wave-expands-leap-quantum-cloud-service-and-application-environment-europe-and

Link to X9: https://x9.org

Subscribe to HPCwire's Weekly Update!

Be the most informed person in the room! Stay ahead of the tech trends with industy updates delivered to you every week!

ISC19 Student Kluster Kompetition: Meet the Teams!

June 25, 2019

Finally! The videos have been rendered, the statistics compiled, and the story lines set. It’s time to share with you the incredible event that was the ISC 2019 Student Cluster Competition. So what’s a Student Clu Read more…

By Dan Olds

What’s New in HPC Research: Rock Art, Protein Design, Genome Assembly & More

June 25, 2019

In this bimonthly feature, HPCwire highlights newly published research in the high-performance computing community and related domains. From parallel programming to exascale to quantum computing, the details are here. Read more…

By Oliver Peckham

Azure Benchmarks HC-series Across 20,000 cores for HPC

June 25, 2019

Cloud provider Microsoft Azure’s push into HPC continues to gain momentum. In a blog last week, Evan Burness, principal program manager, Azure HPC, announced HC-series Virtual Machine are now available in West US 2 and Read more…

By John Russell

HPE Extreme Performance Solutions

HPE and Intel® Omni-Path Architecture: How to Power a Cloud

Learn how HPE and Intel® Omni-Path Architecture provide critical infrastructure for leading Nordic HPC provider’s HPCFLOW cloud service.

For decades, HPE has been at the forefront of high-performance computing, and we’ve powered some of the fastest and most robust supercomputers in the world. Read more…

IBM Accelerated Insights

Rediscovering the Value of the Past

Some people would like to forget their past, perhaps for good reasons. But for business or research organizations, preserving institutional memory can be the key to thriving in the future. Read more…

MLPerf Expands Toolset; Launches Inferencing Suite

June 24, 2019

MLPerf today launched a benchmark suite for inferencing, v0.5, which joins the MLPerf training suite launched a little over a year ago. The new inferencing benchmark, which has been anticipated, covers models applicable Read more…

By John Russell

ISC19 Student Kluster Kompetition: Meet the Teams!

June 25, 2019

Finally! The videos have been rendered, the statistics compiled, and the story lines set. It’s time to share with you the incredible event that was the ISC 20 Read more…

By Dan Olds

MLPerf Expands Toolset; Launches Inferencing Suite

June 24, 2019

MLPerf today launched a benchmark suite for inferencing, v0.5, which joins the MLPerf training suite launched a little over a year ago. The new inferencing benc Read more…

By John Russell

Is Weather and Climate Prediction the Perfect ‘Pilot’ for Exascale?

June 21, 2019

At ISC 2019 this week, Peter Bauer – deputy director of research for the European Centre for Medium-Range Weather Forecasts (ECMWF) – outlined an ambitious Read more…

By Oliver Peckham

ISC Keynote: Thomas Sterling’s Take on Whither HPC

June 20, 2019

Entertaining, insightful, and unafraid to launch the occasional verbal ICBM, HPC pioneer Thomas Sterling delivered his 16th annual closing keynote at ISC yesterday. He explored, among other things: exascale machinations; quantum’s bubbling money pot; Arm’s new HPC viability; Europe’s... Read more…

By John Russell

IBM Claims No. 1 Commercial Supercomputer with Total Oil & Gas System 

June 20, 2019

IBM can now boast not only the two most powerful supercomputers in the world, it also has claimed the top spot for a supercomputer used in a commercial setting. Read more…

By Staff Report

HPC on Pace for 5-Year 6.8% CAGR; Guess Which Hyperscaler Spent $10B on IT Last Year?

June 20, 2019

In the neck-and-neck horse race for HPC server market share, HPE has hung on to a slim, shrinking lead over Dell EMC – but if server and storage market shares Read more…

By Doug Black

ISC 2019 Research Paper Award Winners Announced

June 19, 2019

At the 2019 International Supercomputing Conference (ISC) in Frankfurt this week, the ISC committee awarded the event's top prizes for outstanding research pape Read more…

By Oliver Peckham

ISC Keynote: The Algorithms of Life – Scientific Computing for Systems Biology

June 19, 2019

Systems biology has existed loosely under many definitions for a couple of decades. It’s the notion of describing living systems using first-principle physics Read more…

By John Russell

High Performance (Potato) Chips

May 5, 2006

In this article, we focus on how Procter & Gamble is using high performance computing to create some common, everyday supermarket products. Tom Lange, a 27-year veteran of the company, tells us how P&G models products, processes and production systems for the betterment of consumer package goods. Read more…

By Michael Feldman

Cray, AMD to Extend DOE’s Exascale Frontier

May 7, 2019

Cray and AMD are coming back to Oak Ridge National Laboratory to partner on the world’s largest and most expensive supercomputer. The Department of Energy’s Read more…

By Tiffany Trader

Graphene Surprises Again, This Time for Quantum Computing

May 8, 2019

Graphene is fascinating stuff with promise for use in a seeming endless number of applications. This month researchers from the University of Vienna and Institu Read more…

By John Russell

Why Nvidia Bought Mellanox: ‘Future Datacenters Will Be…Like High Performance Computers’

March 14, 2019

“Future datacenters of all kinds will be built like high performance computers,” said Nvidia CEO Jensen Huang during a phone briefing on Monday after Nvidia revealed scooping up the high performance networking company Mellanox for $6.9 billion. Read more…

By Tiffany Trader

AMD Verifies Its Largest 7nm Chip Design in Ten Hours

June 5, 2019

AMD announced last week that its engineers had successfully executed the first physical verification of its largest 7nm chip design – in just ten hours. The AMD Radeon Instinct Vega20 – which boasts 13.2 billion transistors – was tested using a TSMC-certified Calibre nmDRC software platform from Mentor. Read more…

By Oliver Peckham

It’s Official: Aurora on Track to Be First US Exascale Computer in 2021

March 18, 2019

The U.S. Department of Energy along with Intel and Cray confirmed today that an Intel/Cray supercomputer, "Aurora," capable of sustained performance of one exaf Read more…

By Tiffany Trader

Deep Learning Competitors Stalk Nvidia

May 14, 2019

There is no shortage of processing architectures emerging to accelerate deep learning workloads, with two more options emerging this week to challenge GPU leader Nvidia. First, Intel researchers claimed a new deep learning record for image classification on the ResNet-50 convolutional neural network. Separately, Israeli AI chip startup Hailo.ai... Read more…

By George Leopold

TSMC and Samsung Moving to 5nm; Whither Moore’s Law?

June 12, 2019

With reports that Taiwan Semiconductor Manufacturing Co. (TMSC) and Samsung are moving quickly to 5nm manufacturing, it’s a good time to again ponder whither goes the venerable Moore’s law. Shrinking feature size has of course been the primary hallmark of achieving Moore’s law... Read more…

By John Russell

Leading Solution Providers

ISC 2019 Virtual Booth Video Tour


Nvidia Embraces Arm, Declares Intent to Accelerate All CPU Architectures

June 17, 2019

As the Top500 list was being announced at ISC in Frankfurt today with an upgraded petascale Arm supercomputer in the top third of the list, Nvidia announced its Read more…

By Tiffany Trader

The Case Against ‘The Case Against Quantum Computing’

January 9, 2019

It’s not easy to be a physicist. Richard Feynman (basically the Jimi Hendrix of physicists) once said: “The first principle is that you must not fool yourse Read more…

By Ben Criger

Top500 Purely Petaflops; US Maintains Performance Lead

June 17, 2019

With the kick-off of the International Supercomputing Conference (ISC) in Frankfurt this morning, the 53rd Top500 list made its debut, and this one's for petafl Read more…

By Tiffany Trader

Cray – and the Cray Brand – to Be Positioned at Tip of HPE’s HPC Spear

May 22, 2019

More so than with most acquisitions of this kind, HPE’s purchase of Cray for $1.3 billion, announced last week, seems to have elements of that overused, often Read more…

By Doug Black and Tiffany Trader

Intel Launches Cascade Lake Xeons with Up to 56 Cores

April 2, 2019

At Intel's Data-Centric Innovation Day in San Francisco (April 2), the company unveiled its second-generation Xeon Scalable (Cascade Lake) family and debuted it Read more…

By Tiffany Trader

Announcing four new HPC capabilities in Google Cloud Platform

April 15, 2019

When you’re running compute-bound or memory-bound applications for high performance computing or large, data-dependent machine learning training workloads on Read more…

By Wyatt Gorman, HPC Specialist, Google Cloud; Brad Calder, VP of Engineering, Google Cloud; Bart Sano, VP of Platforms, Google Cloud

In Wake of Nvidia-Mellanox: Xilinx to Acquire Solarflare

April 25, 2019

With echoes of Nvidia’s recent acquisition of Mellanox, FPGA maker Xilinx has announced a definitive agreement to acquire Solarflare Communications, provider Read more…

By Doug Black

Nvidia Claims 6000x Speed-Up for Stock Trading Backtest Benchmark

May 13, 2019

A stock trading backtesting algorithm used by hedge funds to simulate trading variants has received a massive, GPU-based performance boost, according to Nvidia, Read more…

By Doug Black

  • arrow
  • Click Here for More Headlines
  • arrow
Do NOT follow this link or you will be banned from the site!
Share This