AMD Launches Epyc Rome, First 7nm CPU

By Tiffany Trader

August 8, 2019

From a gala event at the Palace of Fine Arts in San Francisco yesterday (Aug. 7), AMD launched its second-generation Epyc Rome x86 chips, based on its 7nm process technology. The new AMD Epyc 7002 series is a follow-on to the first-gen 14nm Epyc Naples CPUs, released in June 2017. The announcement marks a significant competitive step for AMD in its struggle to take market share from segment leader Intel. Intel meanwhile is preparing its 14nm Cooper Lake server chip line for launch in the first half of 2020 with 10nm Ice Lake to follow.

At the event held for press, analysts and partners, AMD emphasized its process leadership, a performance advantage over the Intel Cascade Lake line and put a sharp focus on security, which has been on a continuous news cycle since the Spectre/Meltdown vulnerabilities came to light over a year-and-a-half ago.

The 7002 processors feature up to 64 “Zen 2” cores per SOC, deliver up to 23 percent more instructions per clock (IPC) per core on server workloads and up to four times more L3 cache compared to the previous generation, said AMD. The top bin part (the Epyc 7742, 225-240 watt TDP) provides 3.48 teraflops of peak double-precision performance running at max boost frequency of 3.4 GHz — almost 7 teraflops in a dual-socket server. At its base frequency of 2.25 GHz, the 7742 tops out as a theoretical 2.3 double-precision teraflops.

The second-gen Epyc SoCs are built as nine-die packages with eight 7nm complex core die (CCD) chiplets — with up to eight cores each — surrounding a 14nm I/O die, connected via AMD’s second-gen Infinity fabric. AMD says the next-generation Infinity architecture gives customers access to the most I/O and memory bandwidth in its class, with 128 lanes of PCIe generation 4 (or more in custom builds). The upgraded fabric nearly doubles throughput, pushing 18GT/s socket-to-socket compared with 10.7 GT/s of throughput in the first generation chips.

Moving from traditional monolithic to a hybrid multi-die architecture. (Source: AMD)

“Adoption of our new leadership server processors is accelerating with multiple new enterprise, cloud and HPC customers choosing Epyc processors to meet their most demanding server computing needs,” said AMD CEO Lisa Su, noting that there are more than 60 Eypc-based platforms in the market today. The company also reported that its second gen server processors hold 80 records, 15 of them in HPC, while delivering an estimated 25-50 percent lower TCO than competitive offerings.

In terms of security protection, the new chips are said to deliver “hardened at the core” features based on a silicon-embedded security subsystem and advanced features such as Secure Memory Encryption and Secure Encrypted Virtualization.

Market watcher Patrick Moorhead, Moor Insights & Strategy president and principal analyst, said the launch was a bigger leap forward than he had expected. “AMD improved most of its Gen 1 shortcomings like single-thread performance (+15 percent) and core scaling and added new RAS (uncorrectable DRAM error entry) and security (Secure Memory Encryption, Secure Encrypted Virtualization, 509 keys) capabilities, in addition to substantial, multi-core performance gains,” he shared.

Single-Sockets and Simplified SKU Stacks

2nd Gen Epyc 2P product stack for dual-socket servers (click to enlarge)

In a pre-briefing held the evening before the launch, Scott Aylor, AMD’s datacenter solutions group corporate VP/GM, underscored the momentum of the company’s single-socket strategy begun with the launch of first-gen Epyc two years ago. “With the current Epyc second generation technology, we will have the ability to address the entire two-socket market with our single-socket offering today for the first time ever,” said Aylor. “In our first generation, a fantastic start, we addressed about 50 percent of the addressable market with single-socket technology; now we’ve totally changed the trajectory of that with the second generation.”

Aylor also clarified that while there are dedicated dual- and single-socket SKUs, every Epyc first generation and second generation processor can be made single socket. “We choose to make some of those only single socket to drive our single socket agenda in the market,” he said.

2nd Gen Epyc 1P product stack for single-socket servers (click to enlarge)

AMD also emphasized the simplicity of its product stack. “We have a very simple, straightforward stack. Customers can choose the level of performance they want, the number of cores that they need for their application or workload, and procure that. No compromises. Because with the Epyc stack, all features are included in every Epyc processor. Every customer gets it all,” said AMD SVP Forrest Norrod during the launch.

Highlights of the nearly two-and-a-half hour event included HPE and Lenovo announcing the immediate availability of new platforms, with Lenovo being a major go-to-market partner to execute AMD’s single-socket strategy. Dell EMC, which launched single-socket first-gen Epyc-based PowerEdge servers last year, said it is planning to debut Rome platforms in the fall.

See endnotes for additional details.

HPC partner Cray also showed up to support the launch. Cray CEO Pete Ungaro reviewed the company’s big wins with AMD at Oak Ridge (Frontier) and at NERSC (Perlmutter) and announced that the U.S. Air Force Weather Agency will use a Cray Shasta system with second-gen Epycs to provide terrestrial and space weather information to the the Air Force and the U.S. Army.

AMD highlighted a number of HPC benchmarks in which it said its 64-core Epyc 7742 is outperforming Intel’s Xeon Platinum 28-core 8280 chip, noting up to 2x better performance in computational fluid dynamics and up to 72 percent higher performance for structural analysis (see slide above right, and endnotes for details). Further, in comparisons with Intel’s Xeon Platinum 8280L, AMD said Epyc 7742 achieved 97 percent higher performance in SpecRate 2017 integer (peak) workloads (source: link1, link2) and offered 88 percent faster SpecRate 2017 (peak) floating point performance (source: link1, link2).

Twitter Senior Director of Engineering Jen Frazer joined AMD’s Su on stage to report that the social media company is using the second-gen AMD Epyc to improve the TCO of its datacenters by 25 percent. Su’s admission that she is “a huge fan of Twitter” drew a collective chuckle from the audience, probably due to Su’s denial on Twitter the day before of rumors that she might join IBM as CEO.

Speaking of speculation, the buzz about Google potentially being a major launch partner panned out. Two hours into the proceedings, Su came back to the stage to welcome one final special guest. Bart Sano, Google’s vice president of platforms, revealed the web giant has deployed the 2nd gen AMD Epyc processors in its internal infrastructure production datacenter environment, marking the first Rome deployment of this kind. Sano also disclosed that by year end Google will support new general-purpose machines powered by the new chips on the Google Cloud Compute Engine.

The other big hyperscale partner at this launch was Microsoft Azure. Azure HBv2 instances, powered by Rome, are available today in preview and will support up to 36,000 cores for MPI workloads in a single virtual machine scale set, and up to 80,000 cores for larger customers, according to Evan Burness, principal program manager, Azure HPC.

Azure Corporate Vice President Girish Bablani reported that HBv2 VMs featuring 120 second-gen Epyc CPUs are demonstrating performance gains of over 100 percent on HPC workloads like fluid dynamics and automotive crash test analysis. HBv2 also marks the cloud’s first deployment of 200 Gigabit InfiniBand. Full availability for the upgraded instances is scheduled for Q4.


Benchmarking details for “Leadership Performance” slide

• Based on AMD internal testing of ESI VPS 2018.0, NEON4m benchmark, as of July 17, 2019 using a 2P EPYC 7742 powered reference server versus a 2P Xeon Platinum 8280 powered server. Results may vary.
• Based on AMD internal testing of Altair RADIOSS 2018, T10M benchmark, as of July 17, 2019 using a 2P EPYC 7742 powered reference server versus a 2P Xeon Platinum 8280 powered server. Results may vary.
• Based on AMD internal testing of LSTC LS-DYNA R9.3.0, neon benchmark, as of July 17, 2019 of a 2P EPYC 7742 powered reference server versus a 2P Xeon Platinum 8280 powered server. Results may vary.
• Based on AMD internal testing of Siemens PLM STAR-CCM+ 14.02.009, kcs_with_physics benchmark, as of July 17, 2019 using a 2P EPYC 7742 powered reference server versus a 2P Xeon Platinum 8280 powered server. Results may vary.
• Based on AMD internal testing of ANSYS FLUENT 19.1, lm6000_16m benchmark, as of July 17, 2019 of a 2P EPYC 7742 powered reference server versus a 2P Intel Xeon Platinum 8280 powered server. Results may vary.

Subscribe to HPCwire's Weekly Update!

Be the most informed person in the room! Stay ahead of the tech trends with industy updates delivered to you every week!

Stampede2 ‘Shocks’ with New Shock Turbulence Insights

August 19, 2019

Shockwaves play roles in everything from high-speed aircraft to supernovae – and now, supercomputer-powered research from the Texas A&M University and the Texas Advanced Computing Center (TACC) is helping to shed l Read more…

By Oliver Peckham

Nanosheet Transistors: The Last Step in Moore’s Law?

August 19, 2019

Forget for a moment the clamor around the decline of Moore’s Law. It's had a brilliant run, something to be marveled at given it’s not a law at all. Squeezing out the last bit of performance that roughly corresponds Read more…

By John Russell

Ayar Labs to Demo Photonics Chiplet in FPGA Package at Hot Chips

August 19, 2019

Silicon startup Ayar Labs continues to gain momentum with its DARPA-backed optical chiplet technology that puts advanced electronics and optics on the same chip using standard CMOS fabrication. At Hot Chips 31 in Stanfor Read more…

By Tiffany Trader

AWS Solution Channel

Efficiency and Cost-Optimization for HPC Workloads – AWS Batch and Amazon EC2 Spot Instances

High Performance Computing on AWS leverages the power of cloud computing and the extreme scale it offers to achieve optimal HPC price/performance. With AWS you can right size your services to meet exactly the capacity requirements you need without having to overprovision or compromise capacity. Read more…

HPE Extreme Performance Solutions

Bring the combined power of HPC and AI to your business transformation

FPGA (Field Programmable Gate Array) acceleration cards are not new, as they’ve been commercially available since 1984. Typically, the emphasis around FPGAs has centered on the fact that they’re programmable accelerators, and that they can truly offer workload specific hardware acceleration solutions without requiring custom silicon. Read more…

IBM Accelerated Insights

Keys to Attracting the Newest HPC Talent – Post-Millennials

[Connect with HPC users and learn new skills in the IBM Spectrum LSF User Community.]

For engineers and scientists growing up in the 80s, the current state of HPC makes perfect sense. Read more…

Talk to Me: Nvidia Claims NLP Inference, Training Records

August 15, 2019

Nvidia says it’s achieved significant advances in conversation natural language processing (NLP) training and inference, enabling more complex, immediate-response interchanges between customers and chatbots. And the co Read more…

By Doug Black

Ayar Labs to Demo Photonics Chiplet in FPGA Package at Hot Chips

August 19, 2019

Silicon startup Ayar Labs continues to gain momentum with its DARPA-backed optical chiplet technology that puts advanced electronics and optics on the same chip Read more…

By Tiffany Trader

Scientists to Tap Exascale Computing to Unlock the Mystery of our Accelerating Universe

August 14, 2019

The universe and everything in it roared to life with the Big Bang approximately 13.8 billion years ago. It has continued expanding ever since. While we have a Read more…

By Rob Johnson

AI is the Next Exascale – Rick Stevens on What that Means and Why It’s Important

August 13, 2019

Twelve years ago the Department of Energy (DOE) was just beginning to explore what an exascale computing program might look like and what it might accomplish. Today, DOE is repeating that process for AI, once again starting with science community town halls to gather input and stimulate conversation. The town hall program... Read more…

By Tiffany Trader and John Russell

Cray Wins NNSA-Livermore ‘El Capitan’ Exascale Contract

August 13, 2019

Cray has won the bid to build the first exascale supercomputer for the National Nuclear Security Administration (NNSA) and Lawrence Livermore National Laborator Read more…

By Tiffany Trader

AMD Launches Epyc Rome, First 7nm CPU

August 8, 2019

From a gala event at the Palace of Fine Arts in San Francisco yesterday (Aug. 7), AMD launched its second-generation Epyc Rome x86 chips, based on its 7nm proce Read more…

By Tiffany Trader

Lenovo Drives Single-Socket Servers with AMD Epyc Rome CPUs

August 7, 2019

No summer doldrums here. As part of the AMD Epyc Rome launch event in San Francisco today, Lenovo announced two new single-socket servers, the ThinkSystem SR635 Read more…

By Doug Black

Building Diversity and Broader Engagement in the HPC Community

August 7, 2019

Increasing diversity and inclusion in HPC is a community-building effort. Representation of both issues and individuals matters - the more people see HPC in a w Read more…

By AJ Lauer

Xilinx vs. Intel: FPGA Market Leaders Launch Server Accelerator Cards

August 6, 2019

The two FPGA market leaders, Intel and Xilinx, both announced new accelerator cards this week designed to handle specialized, compute-intensive workloads and un Read more…

By Doug Black

High Performance (Potato) Chips

May 5, 2006

In this article, we focus on how Procter & Gamble is using high performance computing to create some common, everyday supermarket products. Tom Lange, a 27-year veteran of the company, tells us how P&G models products, processes and production systems for the betterment of consumer package goods. Read more…

By Michael Feldman

Supercomputer-Powered AI Tackles a Key Fusion Energy Challenge

August 7, 2019

Fusion energy is the Holy Grail of the energy world: low-radioactivity, low-waste, zero-carbon, high-output nuclear power that can run on hydrogen or lithium. T Read more…

By Oliver Peckham

Cray, AMD to Extend DOE’s Exascale Frontier

May 7, 2019

Cray and AMD are coming back to Oak Ridge National Laboratory to partner on the world’s largest and most expensive supercomputer. The Department of Energy’s Read more…

By Tiffany Trader

Graphene Surprises Again, This Time for Quantum Computing

May 8, 2019

Graphene is fascinating stuff with promise for use in a seeming endless number of applications. This month researchers from the University of Vienna and Institu Read more…

By John Russell

AMD Verifies Its Largest 7nm Chip Design in Ten Hours

June 5, 2019

AMD announced last week that its engineers had successfully executed the first physical verification of its largest 7nm chip design – in just ten hours. The AMD Radeon Instinct Vega20 – which boasts 13.2 billion transistors – was tested using a TSMC-certified Calibre nmDRC software platform from Mentor. Read more…

By Oliver Peckham

TSMC and Samsung Moving to 5nm; Whither Moore’s Law?

June 12, 2019

With reports that Taiwan Semiconductor Manufacturing Co. (TMSC) and Samsung are moving quickly to 5nm manufacturing, it’s a good time to again ponder whither goes the venerable Moore’s law. Shrinking feature size has of course been the primary hallmark of achieving Moore’s law... Read more…

By John Russell

Cray Wins NNSA-Livermore ‘El Capitan’ Exascale Contract

August 13, 2019

Cray has won the bid to build the first exascale supercomputer for the National Nuclear Security Administration (NNSA) and Lawrence Livermore National Laborator Read more…

By Tiffany Trader

Deep Learning Competitors Stalk Nvidia

May 14, 2019

There is no shortage of processing architectures emerging to accelerate deep learning workloads, with two more options emerging this week to challenge GPU leader Nvidia. First, Intel researchers claimed a new deep learning record for image classification on the ResNet-50 convolutional neural network. Separately, Israeli AI chip startup Hailo.ai... Read more…

By George Leopold

Leading Solution Providers

ISC 2019 Virtual Booth Video Tour

CRAY
CRAY
DDN
DDN
DELL EMC
DELL EMC
GOOGLE
GOOGLE
ONE STOP SYSTEMS
ONE STOP SYSTEMS
PANASAS
PANASAS
VERNE GLOBAL
VERNE GLOBAL

Nvidia Embraces Arm, Declares Intent to Accelerate All CPU Architectures

June 17, 2019

As the Top500 list was being announced at ISC in Frankfurt today with an upgraded petascale Arm supercomputer in the top third of the list, Nvidia announced its Read more…

By Tiffany Trader

Top500 Purely Petaflops; US Maintains Performance Lead

June 17, 2019

With the kick-off of the International Supercomputing Conference (ISC) in Frankfurt this morning, the 53rd Top500 list made its debut, and this one's for petafl Read more…

By Tiffany Trader

AMD Launches Epyc Rome, First 7nm CPU

August 8, 2019

From a gala event at the Palace of Fine Arts in San Francisco yesterday (Aug. 7), AMD launched its second-generation Epyc Rome x86 chips, based on its 7nm proce Read more…

By Tiffany Trader

A Behind-the-Scenes Look at the Hardware That Powered the Black Hole Image

June 24, 2019

Two months ago, the first-ever image of a black hole took the internet by storm. A team of scientists took years to produce and verify the striking image – an Read more…

By Oliver Peckham

Cray – and the Cray Brand – to Be Positioned at Tip of HPE’s HPC Spear

May 22, 2019

More so than with most acquisitions of this kind, HPE’s purchase of Cray for $1.3 billion, announced last week, seems to have elements of that overused, often Read more…

By Doug Black and Tiffany Trader

Chinese Company Sugon Placed on US ‘Entity List’ After Strong Showing at International Supercomputing Conference

June 26, 2019

After more than a decade of advancing its supercomputing prowess, operating the world’s most powerful supercomputer from June 2013 to June 2018, China is keep Read more…

By Tiffany Trader

In Wake of Nvidia-Mellanox: Xilinx to Acquire Solarflare

April 25, 2019

With echoes of Nvidia’s recent acquisition of Mellanox, FPGA maker Xilinx has announced a definitive agreement to acquire Solarflare Communications, provider Read more…

By Doug Black

Qualcomm Invests in RISC-V Startup SiFive

June 7, 2019

Investors are zeroing in on the open standard RISC-V instruction set architecture and the processor intellectual property being developed by a batch of high-flying chip startups. Last fall, Esperanto Technologies announced a $58 million funding round. Read more…

By George Leopold

  • arrow
  • Click Here for More Headlines
  • arrow
Do NOT follow this link or you will be banned from the site!
Share This