Intel announced today it’s begun shipping its 10nm Agilex FPGAs to early access customers, including Microsoft, Colorado Engineering, Mantaro Networks and Silicom. The company said the FPGAs will be the first to support the Compute Express Link (CXL), a cache and memory coherent CPUs-to-anything interconnect announced earlier this year by Intel (along with the 60-plus member CXL Consortium).
According to Intel, the customers will use Agilex FPGAs to develop networking, 5G and AI and accelerated data analytics solutions. Intel said Agilex FPGAs incorporate capabilities that include the new PCIe Gen 5 and second generation HyperFlex architecture, delivering up to 40 percent higher performance or up to 40 percent lower total power than Intel Stratix 10 FPGAs.
The Intel Agilex family is built on Intel’s 10nm process and heterogeneous 3D silicon-in-package (SiP) technology based on Intel’s embedded multi-die interconnect bridge (EMIB) technology. “This combination of advanced technologies allows Intel to integrate analog, memory, custom computing, custom I/O and Intel eASIC device tiles into a single package along with the FPGA fabric,” the company said. Intel offers a “custom logic continuum” that allows developers to migrate designs from FPGAs to low-power ASICs.
Intel also said Agilex is the only FPGA supporting hardened BFLOAT16, with up to 40 teraflops of digital signal processor (DSP) performance (FP16) and that it supports up to 112 Gbps data rates for high-speed networking requirements for 400GE.
“Microsoft has been working closely with Intel on the development of their Intel Agilex FPGAs and we are planning to use them in a number of upcoming projects,” said Doug Burger, technical fellow, Azure Hardware Systems at Microsoft. “Intel FPGAs have provided tremendous value for us for accelerating real-time AI, networking, and other applications/infrastructure across Azure Cloud Services, Bing and other data center services.”