Intel Debuts New GPU – Ponte Vecchio – and Outlines Aspirations for oneAPI

By John Russell

November 17, 2019

Intel today revealed a few more details about its forthcoming Xe line of GPUs – the top SKU is named Ponte Vecchio and will be used in Aurora, the first planned U.S. exascale computer. Intel also provided a glimpse of Aurora’s basic node which will feature two Xeons and six Ponte Vecchios. Intel also took time to dig deeper into its oneAPI effort which is now in “beta launch” and positioned as both an industry initiative and an Intel product intended to enhance development for heterogeneous compute architectures.

The announcements came at Intel’s HPC Developer Conference running today and tomorrow in Denver, almost literally next door to SC19 at the Denver Convention Center, and in a media pre-briefing last week led by Intel’s Raj Hazra, VP & GM for enterprise and government. At the pre-briefing, Hazra fleshed out Intel’s vision for converged HPC-AI and described Intel’s developing “XPU” strategy which embraces CPUs, GPUs, FPGAs, NNP (neural net processors), and other accelerators as necessary elements for advancing computing on all fronts from high-end HPC to small power hungry edge devices.

“No longer [does] one size fit all,” said Hazra. “We have to look at architectures tuned to the needs of varying kinds of workloads in this convergence era.” Citing a 60 percent CAGR for MIPS, Hazra said Intel now needed “a portfolio of architectures” to address compute needs, which he labelled as Intel’s XPU approach.

Relatively few technical details about the Xe were discussed. It will use Intel’s new 7nm process technology, Foveros multi-die packaging, and be ready to use Intel-backed CXL interconnect technology. Ari Rauch, Intel GM visual technology team and graphics business, was coy when asked if Ponte Vecchio would use Intel’s nascent EMIB (embedded multi connect bridge) technology. “We’re not disclosing [that] but you can assume the device is taking into advantage all the latest and greatest technology from Intel …3D packaging, memory technology, they’re all in play.” Later at the DevCon, Intel confirmed the use of EMIB.

He did say Intel was focused on having a common over-arching architecture and common programming model across the Xe line, but in the context of also delivering ‘microarchitectures’ targeting specific workloads. One can imagine a variety of memory, IO, and mixed precision, and power consumption attributes delivered in members of the Xeline. The first Ponte Vecchio devices to market will presumably be in Aurora which is due in 2021. Intel confirmed it planned to sell Xe GPUs as standalone products although with few details and no firm timeline. In fact, the first-to-market Xe device will appear in 2020 and be in a consumer setting according to Intel.

Intel was likewise scant with new details about Aurora which will be located at Argonne National Laboratory. Hazra reiterated Aurora would have more than 200 racks, 230 petabytes of storage, and more than 10 petabytes of memory. The two CPUs on each node will be Sapphire Rapids generation Xeons connected to six Ponte Vecchios and be programmed with Intel’s oneAPI stack.

When asked, Raj declined to say what the rack type would be or to specify the ratio of DDR5 to Optane memory planned. “We will be taking the covers off gradually over the next few months, and we will get to those levels of specific configuration details at that point,” he said. (Interestingly, from a macro level an Aurora node looks a lot like a Summit node – of course the devil is in the details.)

Bill Savage, GM for compute performance and developer products, provided a fair amount of detail around oneAPI which is now available on Intel’s DevCloud. Intel describes oneAPI as a unified programming model to simplify development across diverse architectures.

Savage noted developers generally rely on abstractions to get access to hardware through middleware and frameworks, and in the case of HPC, by coding more closely and directly to the hardware. Targeting new architectures typically requires low level programming and sometimes different programming languages and libraries. The same can said for middleware and frameworks often optimized for specific hardware. Savage pointed to TensorFlow which when first released was “optimized for one vendor’s GPU” and not for anything else.”

The oneAPI vision is expansive. It would offer a “low level common interface to heterogeneous hardware so that HPC developers can code directly to the hardware, through languages and libraries that are shared across architectures and across vendors as well as making sure that middleware and frameworks are powered by one API and fully optimized for the developers that live on top of abstractions.” That seems a worthy idea but a tall order.

Here is Savage on oneAPI and on the decision to create Data Parallel C++ (DPC++) as the base language:

“It is both an industry initiative and an Intel product. [The] industry initiative is driving an open standard with an open source reference implementation with partners in the industry. [By doing this] we can share and reuse source code across architectures and vendors.

“We looked closely at OpenCL, Java and other languages, and how they had compromises in performance or delivered reuse of software. [We] selected a language that could deliver both the productivity and performance. It’s C++ based but has we’ve applied a number extensions to make it more usable, and developer friendly as well as deliver better performance. Then we added a set of APIs for low level libraries to offer a common set of capabilities across the domains of HPC and AI, as well as other domains at the low level. So those are parts of the standard.”

The Intel oneAPI product has a few additional features including a compatibility tool and some analysis and debug tools.

“We have an implementation of the data parallel C++ compiler as well as the set of libraries that match the APIs in the specification. So that’s the core of the Intel one API product. In addition, we took our analysis tools like the VTune Inspector/Advisor, and we’ve enabled those for one API as well debugging and supporting tools,” said Savage.

Intel also developed compatibility tool to aid in source code migration such as Cuda to DPC++. “We get the source in our data parallel C++ that can cross architecture and vendor boundaries and you should get good performance in the first port,” said Savage. He expects tuning for specific microarchitectures will be required to achieve optimum performance.

A big question is who is supporting the effort. At the media pre-briefing Intel promised more information on partners and organization of the initiative would be forthcoming during its developer conference now underway.

Lastly, lest you think the venerable Xeon is being lost in the shuffle of Intel’s emerging XPUs approach, Hazra called it the workhorse of Intel’s converged HPC/AI strategy. As shown below nothing really new about Intel’s CPU roadmap was presented but Hazra emphasized previously discussed plans particularly the addition of mixed-precision capabilities in forthcoming generations.

“We’re shipping our Cascade Lake 14 nanometer processor today with Intel DL Boost, which is also called VNNI (vector neural net instructions), and [it’s] enabled with Optane Datacenter Persistent Memory first generation. That beat continues in 2020 as we introduce Cooper Lake with the next generation of DL Boost and specifically bringing bfloat16, the industry’s converged reduced precision, numeric format for AI into the processor for the first time.”

The 10nm Ice Lake ramp-up continues in the second half of 2020 and will provide more microarchitecture and architectural features for both traditional HPC and AI, said Hazra. Sapphire Rapids, of course, is due in 2021 in time for Aurora. Hazra said little about it beyond it would have impressive scale-out and scale-up performance.

Subscribe to HPCwire's Weekly Update!

Be the most informed person in the room! Stay ahead of the tech trends with industy updates delivered to you every week!

HPC Career Notes: April 2020 Edition

April 2, 2020

In this monthly feature, we’ll keep you up-to-date on the latest career developments for individuals in the high-performance computing community. Whether it’s a promotion, new company hire, or even an accolade, we’ Read more…

By Mariana Iriarte

AMD Epyc CPUs Now on Bare Metal IBM Cloud Servers

April 1, 2020

AMD’s expanding presence in the datacenter and cloud computing markets took a step forward with today’s announcement that its 7nm 2nd Gen Epyc 7642 CPUs are now available on IBM Cloud bare metal servers. AMD, whose Read more…

By Doug Black

Supercomputer Testing Probes Viral Transmission in Airplanes

April 1, 2020

It might be a long time before the general public is flying again, but the question remains: how high-risk is air travel in terms of viral infection? In an article for the Texas Advanced Computing Center (TACC), Faith Si Read more…

By Staff report

ECP Milestone Report Details Progress and Directions

April 1, 2020

The Exascale Computing Project (ECP) milestone report issued last week presents a good snapshot of progress in preparing applications for exascale computing. There are roughly 30 ECP application development (AD) subproj Read more…

By John Russell

Russian Supercomputer Employed to Develop COVID-19 Treatment

March 31, 2020

From Summit to [email protected], global supercomputing is continuing to mobilize against the coronavirus pandemic by crunching massive problems like epidemiology, therapeutic development and vaccine development. The latest a Read more…

By Staff report

AWS Solution Channel

Amazon FSx for Lustre Update: Persistent Storage for Long-Term, High-Performance Workloads

Last year I wrote about Amazon FSx for Lustre and told you how our customers can use it to create pebibyte-scale, highly parallel POSIX-compliant file systems that serve thousands of simultaneous clients driving millions of IOPS (Input/Output Operations per Second) with sub-millisecond latency. Read more…

What’s New in HPC Research: Supersonic Jets, Skin Modeling, Astrophysics & More

March 31, 2020

In this bimonthly feature, HPCwire highlights newly published research in the high-performance computing community and related domains. From parallel programming to exascale to quantum computing, the details are here. Read more…

By Oliver Peckham

Pandemic ‘Wipes Out’ 2020 HPC Market Growth, Flat to 12% Drop Expected

March 31, 2020

As the world battles the still accelerating novel coronavirus, the HPC community has mounted a forceful response to the pandemic on many fronts. But these efforts won't inoculate the HPC industry from the economic effects of COVID-19. Market watcher Intersect360 Research has revised its 2020 forecast for HPC products and services, projecting... Read more…

By Tiffany Trader

Weather at Exascale: Load Balancing for Heterogeneous Systems

March 30, 2020

The first months of 2020 were dominated by weather and climate supercomputing news, with major announcements coming from the UK, the European Centre for Medium- Read more…

By Oliver Peckham

Q&A Part Two: ORNL’s Pooser on Progress in Quantum Communication

March 30, 2020

Quantum computing seems to get more than its fair share of attention compared to quantum communication. That’s despite the fact that quantum networking may be Read more…

By John Russell

DoE Expands on Role of COVID-19 Supercomputing Consortium

March 25, 2020

After announcing the launch of the COVID-19 High Performance Computing Consortium on Sunday, the Department of Energy yesterday provided more details on its sco Read more…

By John Russell

[email protected] Rallies a Legion of Computers Against the Coronavirus

March 24, 2020

Last week, we highlighted [email protected], a massive, crowdsourced computer network that has turned its resources against the coronavirus pandemic sweeping the globe – but [email protected] isn’t the only game in town. The internet is buzzing with crowdsourced computing... Read more…

By Oliver Peckham

Conversation: ANL’s Rick Stevens on DoE’s AI for Science Project

March 23, 2020

With release of the Department of Energy’s AI for Science report in late February, the effort to build a national AI program, modeled loosely on the U.S. Exascale Initiative, enters a new phase. Project leaders have already had early discussions with Congress... Read more…

By John Russell

Servers Headed to Junkyard Find 2nd Life Fighting Cancer in Clusters

March 20, 2020

Ottawa-based charitable organization Cancer Computer is on a mission to stamp out cancer and other life-threatening diseases, including coronavirus, by putting Read more…

By Tiffany Trader

Kubernetes and HPC Applications in Hybrid Cloud Environments – Part II

March 19, 2020

With the rise of cloud services, CIOs are recognizing that applications, middleware, and infrastructure running in various compute environments need a common management and operating model. Maintaining different application and middleware stacks on-premises and in cloud environments, by possibly using different specialized infrastructure and application... Read more…

By Daniel Gruber,Burak Yenier and Wolfgang Gentzsch, UberCloud

[email protected] Turns Its Massive Crowdsourced Computer Network Against COVID-19

March 16, 2020

For gamers, fighting against a global crisis is usually pure fantasy – but now, it’s looking more like a reality. As supercomputers around the world spin up Read more…

By Oliver Peckham

Julia Programming’s Dramatic Rise in HPC and Elsewhere

January 14, 2020

Back in 2012 a paper by four computer scientists including Alan Edelman of MIT introduced Julia, A Fast Dynamic Language for Technical Computing. At the time, t Read more…

By John Russell

Global Supercomputing Is Mobilizing Against COVID-19

March 12, 2020

Tech has been taking some heavy losses from the coronavirus pandemic. Global supply chains have been disrupted, virtually every major tech conference taking place over the next few months has been canceled... Read more…

By Oliver Peckham

[email protected] Rallies a Legion of Computers Against the Coronavirus

March 24, 2020

Last week, we highlighted [email protected], a massive, crowdsourced computer network that has turned its resources against the coronavirus pandemic sweeping the globe – but [email protected] isn’t the only game in town. The internet is buzzing with crowdsourced computing... Read more…

By Oliver Peckham

DoE Expands on Role of COVID-19 Supercomputing Consortium

March 25, 2020

After announcing the launch of the COVID-19 High Performance Computing Consortium on Sunday, the Department of Energy yesterday provided more details on its sco Read more…

By John Russell

Steve Scott Lays Out HPE-Cray Blended Product Roadmap

March 11, 2020

Last week, the day before the El Capitan processor disclosures were made at HPE's new headquarters in San Jose, Steve Scott (CTO for HPC & AI at HPE, and former Cray CTO) was on-hand at the Rice Oil & Gas HPC conference in Houston. He was there to discuss the HPE-Cray transition and blended roadmap, as well as his favorite topic, Cray's eighth-gen networking technology, Slingshot. Read more…

By Tiffany Trader

Fujitsu A64FX Supercomputer to Be Deployed at Nagoya University This Summer

February 3, 2020

Japanese tech giant Fujitsu announced today that it will supply Nagoya University Information Technology Center with the first commercial supercomputer powered Read more…

By Tiffany Trader

Tech Conferences Are Being Canceled Due to Coronavirus

March 3, 2020

Several conferences scheduled to take place in the coming weeks, including Nvidia’s GPU Technology Conference (GTC) and the Strata Data + AI conference, have Read more…

By Alex Woodie

Leading Solution Providers

SC 2019 Virtual Booth Video Tour

AMD
AMD
ASROCK RACK
ASROCK RACK
AWS
AWS
CEJN
CJEN
CRAY
CRAY
DDN
DDN
DELL EMC
DELL EMC
IBM
IBM
MELLANOX
MELLANOX
ONE STOP SYSTEMS
ONE STOP SYSTEMS
PANASAS
PANASAS
SIX NINES IT
SIX NINES IT
VERNE GLOBAL
VERNE GLOBAL
WEKAIO
WEKAIO

Cray to Provide NOAA with Two AMD-Powered Supercomputers

February 24, 2020

The United States’ National Oceanic and Atmospheric Administration (NOAA) last week announced plans for a major refresh of its operational weather forecasting supercomputers, part of a 10-year, $505.2 million program, which will secure two HPE-Cray systems for NOAA’s National Weather Service to be fielded later this year and put into production in early 2022. Read more…

By Tiffany Trader

Exascale Watch: El Capitan Will Use AMD CPUs & GPUs to Reach 2 Exaflops

March 4, 2020

HPE and its collaborators reported today that El Capitan, the forthcoming exascale supercomputer to be sited at Lawrence Livermore National Laboratory and serve Read more…

By John Russell

Summit Supercomputer is Already Making its Mark on Science

September 20, 2018

Summit, now the fastest supercomputer in the world, is quickly making its mark in science – five of the six finalists just announced for the prestigious 2018 Read more…

By John Russell

IBM Unveils Latest Achievements in AI Hardware

December 13, 2019

“The increased capabilities of contemporary AI models provide unprecedented recognition accuracy, but often at the expense of larger computational and energet Read more…

By Oliver Peckham

TACC Supercomputers Run Simulations Illuminating COVID-19, DNA Replication

March 19, 2020

As supercomputers around the world spin up to combat the coronavirus, the Texas Advanced Computing Center (TACC) is announcing results that may help to illumina Read more…

By Staff report

IBM Debuts IC922 Power Server for AI Inferencing and Data Management

January 28, 2020

IBM today launched a Power9-based inference server – the IC922 – that features up to six Nvidia T4 GPUs, PCIe Gen 4 and OpenCAPI connectivity, and can accom Read more…

By John Russell

Summit Joins the Fight Against the Coronavirus

March 6, 2020

With the coronavirus sweeping the globe, tech conferences and supply chains are being hit hard – but now, tech is hitting back. Oak Ridge National Laboratory Read more…

By Staff report

University of Stuttgart Inaugurates ‘Hawk’ Supercomputer

February 20, 2020

This week, the new “Hawk” supercomputer was inaugurated in a ceremony at the High-Performance Computing Center of the University of Stuttgart (HLRS). Offici Read more…

By Staff report

  • arrow
  • Click Here for More Headlines
  • arrow
Do NOT follow this link or you will be banned from the site!
Share This