Intel today introduced the ‘first-of-its-kind’ cryo-controller chip for quantum computing and previewed a cryo-prober tool for characterizing quantum processor chips. The new controller is a mixed-signal SoC named Horse Ridge after one of the coldest regions in Oregon and is designed to operate at approximately 4 Kelvin. Both devices attack key challenges in quantum computing – the ability to scale up the number of qubits in a processor and the ability to quickly characterize them.
The announcements came at the IEEE International Electron Devices Meeting (2019 IEDM) being held this week in San Francisco with more details expected at the 2020 IEEE Solid State Circuits Conference (ISSCC) in February.
To some extent, Intel has avoided limelight in quantum computing. For one thing, its quantum computing research program is relatively young, roughly four years old. It hasn’t yet produced a named prototype system or publicly engaged in the race to increase qubit counts. Instead Intel insists it has taken a long view and consistently maintained it will be years before quantum computing is mainstream.
Jim Clarke, Intel’s director of quantum hardware, says eight years is a good guess for the time required before we reach ‘Quantum Practicality’, Intel’s term of art for when quantum computers will be able to do useful work. He deflects criticism that Intel is simply late to the game by wondering why most current quantum computing research embraces exotic technologies that are difficult to work with. The current leading contender is semiconductor-based, superconducting qubits which require exotic hardware and extreme cold. Why not CMOS, asks Clarke.
“Let me describe it like this,” said Clarke in pre-briefing with HPCwire. “Superconducting qubits have a lot of momentum because there are already systems that are let’s say 50 qubits. Trapped ions are interesting because the best two-qubit gate, for example, is done with a trapped ion system. Topological qubits are interesting, because they might not need error correction. Nitrogen vacancy or diamond qubits might not have to operate at low temperature.
“This is the kind of feedback I get when I meet with a roomful of academics. They list off these technologies. They don’t usually talk about the limitations of each technology. And relatively few of them will say, “Well heck, the world’s entire technology has been based on silicon devices for the last more than 50 years. Why isn’t this more interesting?
“So, on the one hand when I think about technologies, relying on the one that has built our entire technological infrastructure for the last 50 years isn’t getting enough attention. And actually, I’m okay with that. Because that means Intel is going to be all that farther ahead. So, all these technologies have strengths and weaknesses, the one that I think has the most potential is the one that’s just building on Moore’s law and good old silicon.”
Intel, not surprisingly, is focused on developing silicon spin qubit technology[I] that leverages existing CMOS manufacturing techniques, although it also has a superconducting effort. “To put [it] in perspective, the current superconducting qubits studied by some of our competitors are roughly a million times larger than our silicon spin qubits which look a lot like transistors,” Clarke said.
Intel isn’t wrong about the formidable technical hurdles facing quantum computing. Its new Horse Ridge cryo-controller is aimed at one of the most vexing problems – connecting to and controlling qubits in a way that permits dramatic scaling up of the number of qubits. Currently, individual wires are used to control qubits and must pass through normal-to-frigid temperature zones to do so.
John Martinis, head of Google’s quantum work, didn’t minimize the challenge in his comments following Google’s public announcement of achieving Quantum Supremacy (see HPCwire coverage) in October. Martinis said, “Breaking RSA is going to take, let’s say, 100 million physical qubits. And you know, right now we’re at what is it? 53. So, that’s going to take a few years.” Asked how many qubits can be squeezed into a dilution refrigerator using wires – thousands or millions – Martinis said, “For thousands, we believe yes. We do see a pathway forward…but we’ll be building a scientific instrument that is really going to have to bring a lot of new technologies.”
Indeed, Google’s 54-qubit Sycamore chip actually functioned as a 53-qubit device during the supremacy exercise because one of the control wires broke.
You get the picture. There’s lots to do before QC hits even a modest practical stride. Amid the quantum noise Intel has been relatively quiet. During the briefing with HPCwire, Clark discussed the new cryo-controller, the new cryo-prober, Intel’s long-term strategy, and more.
Presented below are a few of Clarke’s comments but first, given Intel’s long-time role as a key component supplier to the electronics world, it is natural to wonder if Intel is considering a similar path within the emerging quantum systems community.
Bob Sorensen, VP of research and technology, Hyperion Research noted, “What is unclear from this announcement is if Intel intends to make this new SoC technology available to the larger QC development community or keep the technology in-house to support their own internal QC development activities. The answer to that question is critical: does Intel plan on building their own soup-to-nuts QC system in-house with all of the associated technical demand from both a hardware and software perspective, or will they make the chip available as a commercial part, seeking to take the first steps in dividing up the commercial QC hardware stack by supplying this and perhaps other key QC sub-assemblies to a wide range of QC hardware developers. Each option brings with it some interesting challenges and opportunities, not only for Intel but for the QC sector writ large.”
We’ll see. Clarke wouldn’t say much on the matter but didn’t rule it out.
HPCwire: Maybe start with a recap of the news. Why is the new cryo-controller important and what does it do?
Clarke: If what you see is a system of 50 qubits where each qubit is controlled with an individual wire or individual coaxial cable, it’s hard to imagine a system of a million qubits controlled in the same way. These are wires that go out of the [dilution] fridge to a rack of instruments, not unlike what you would see in the university laboratory. It’s a brute force type of control scheme.
What we’ve done, using our baseline CMOS technology, is designed a control chip to control qubits where this control chip is actually inside the dilution refrigerator. We’ve used a chip fabbed on our 22-nm process line. So this is Intel FINFET technology that has been optimized for performance at low temperature.
Intel is focusing on what’s known as a silicon spin qubit, which looks a lot like transistor. The energetics of this [type of] qubit allows us to put these control chip in close proximity to the qubit chip; so to a certain extent compared to some of the other technologies out there, like the Google technology, the IBM technology, we’re a little less sensitive to the temperature effects. Ours is basically an RF microwave chip. We put in a fundamental frequency and then we’re able to multiplex it and shift it to the frequencies tailored to qubits [for control].
HPCwire: Given the nature of the qubit control problem it sounds like this could be technology or a product offering to other quantum computer systems makers. Does Intel plan to sell the devices as components to others?
Clarke: You ask a good question. Here is what I would say nominally without overcommitting. There are a few things that are interesting. Actually, cryogenic electronics are pretty appealing. These devices actually work well at low temperature. It requires a certain redesign of both the device and the circuit, so it’s nontrivial to design these circuits for low temperature. But there may be actually other cryogenic applications where cryogenics CMOS would be useful.
What we’re finding so far, Intel has bets on both superconducting and spin technologies, is the control chips, from an efficiency perspective, are better tailored to one technology or another. The Horse Ridge has been tested on spin qubits. It could also have been tested on superconducting qubits. As we move to more and more complex chips, we will probably tailor them a little bit more to one technology versus another. That being said, there isn’t anything fundamental that would prevent the co-integration of this chip and other technologies.
Remember, the qubit chip [processor] itself is just one component of a larger system. Intel is working on all the components of that large system. I think when we piece it together, this is one of the reasons why we feel confident that Intel will be in the lead by the time quantum computer become practical – because we have all the puzzle pieces: the control chip, which is made in our factories, the qubit chip which is made in our factories, and the quantum architecture which loosely be based on the Intel architecture.
HPCwire: What can you say about the cryo-prober also announced today?
Clarke: You’re familiar with the dilution refrigerators. We have a we have a bunch of them at Intel. But the experiments are very slow. These refrigerators, you basically put a sample in, you cool it down for a few days, you study it for several weeks, if not longer, and then you warm it up and try again. I’m going to contrast that with what we do at Intel with a 300-millimeter wafer. We take the 300-millimeter wafer off our production line, and put it on an electrical prober, and can characterize millions of transistors in an hour. Now that’s at room temperature. It’s a very mature technology and really one of the heartbeats for providing the feedback loop for advancement in semiconductors.
We asked the question, could you combine one of these room temperature probers with a refrigerator? That’s essentially what we’re doing. We’re in the final stages of assembling this tool, and hope to have it at Intel in the next quarter. This is called the cryo prober. So when we talk about timelines [to practical quantum computing], it’s not only having the algorithms ready, but it’s also how much information can you get to really accelerate development program. This is what we’re going to be talking about at the IDF conference in San Francisco next week. This cryo-prober, which we think will allow us to go I would say 100 times faster, one of my peers would say 10,000 times faster in terms of device characterization. It’s basically statistical process control and development.
So these timelines that I give you are somewhat historical, but also somewhat based on the velocity of how fast we can go, and not only are we developing things like Horse Ridge, to give us a more scalable system, but we’re also developing tools like this [cryo-prober]to help us go much, much faster in our development cycle.
HPCwire: What’s your take on the National Quantum Initiative and industry’s and government’s patience in terms of what you say will be a long journey to practical quantum computing?
Clarke: Both Intel and IBM, I can speak to those, and Microsoft participated in the National Quantum Initiative Act [of last year]. We were all on the same page. I mean we could always have more funding, but this is not an insignificant amount of funding ($1.2 billion) and they recognize that this is a long term play rather than a short-term deal. I think we’re all quite pleased with how that’s shaping up. The nice thing was the larger players in the quantum space, we’re all on the same page, and were sitting next to each other at tables in DC. We had both houses of Congress and the White House supporting it. I think we all recognize that this is a marathon, not a sprint.
One of the thrusts of the NQIA, primarily through NIST, is to help develop at least the hardware ecosystem. So these would be related to refrigerators or in the case of ion traps related to laser technology. What’s not seen and what isn’t talked about are things like amplifiers and signal filters that are in every single fridge, no matter the technology. These need advancements [too]. So there’s been something called the QEC– Quantum Economic Development Consortia – that has spun out of NIST as a result of the NQIA and is focusing on those sorts of aspects of the business. That’s just starting. It tends to be you know, broad attendance and active throughout the community.
Now, the software ecosystem is kind of interesting. At last check there are more than 100 companies or startups in the quantum space, and most of them are in the software side of things. And it’s interesting. We have all these software companies, but we don’t have enough qubits to actually test them with, and so it’s somewhat upside down from how the software ecosystem has developed for other types of technologies where the hardware existed first and then came the software. My personal belief is the hardware needs to be a bit more mature before you’re really going to be able to develop the software to go along with it. Some might argue, develop the software first and then make the hardware work with the software. That’s really hard to do when you’re dealing with quantum physics. I think the qubit technologies need to mature first, to see which direction.
Feature Photo: A 2018 photo shows Intel’s new quantum computing chip balanced on a pencil eraser. Researchers started testing this “spin qubit chip” at the extremely low temperatures necessary for quantum computing: about 460 degrees below zero Fahrenheit. Intel projects that qubit-based quantum computers, which operate based on the behaviors of single electrons, could someday be more powerful than today’s supercomputers. (Credit: Walden Kirsch/Intel Corporation)
Abstract of talk by Jim Clarke at APS March meeting
Intel is developing a 300mm process line for spin qubit devices using state-of-the-art immersion lithography and isotopically pure epitaxial silicon layers. Both Si-MOS and Si/SiGe devices are being evaluated in this multi-layer integration scheme. In this talk, we will be sharing our current progress towards spin qubits starting with substrate characterization. Transistors and quantum dot devices are then co-fabricated on the same wafer and allow calibration to Intel’s internal transistor processes. Electrical characterization and feedback is accomplished through wafer scale testing at both room temperature and 1.6K prior to milli-kelvin testing. Accelerated testing across a 300mm wafer provides a vast amount of data that can be used for continuous improvement in both performance and variability. This removes one of the bottlenecks towards a large scale system: trying to deliver an exponentially fast compute technology with a slow and linear characterization scheme using only dilution refrigerators.