Nvidia’s Ampere A100 GPU: Up to 2.5X the HPC, 20X the AI

By Tiffany Trader

May 14, 2020

Nvidia’s first Ampere-based graphics card, the A100 GPU, packs a whopping 54 billion transistors on 826mm2 of silicon, making it the world’s largest seven-nanometer chip. Launched today during a pre-recorded “kitchen keynote” from Nvidia chief Jensen Huang, the Ampere architecture follows in predecessor Volta’s footsteps, a mega-GPU that turns up the dial on transistors, AI specialization and overall performance. Both the 12nm Volta and the 7nm Ampere are manufactured by TSMC.

Jensen Huang holds up new Ampere A100 GPU during his “kitchen keynote.” There was no on-site GPU Technology Conference (GTC) this year, due to the COVID-19 outbreak.

HPC workloads that leverage Ampere benefit from a 250 percent increase in peak double-precision floating point performance over older brother Volta owing to new IEEE-compliant tensor core instructions for HPC processing. Benchmarking conducted by Nvidia realized speedups for HPC workloads ranging between 1.5x and 2.1x over Volta (see the “Accelerating HPC” chart further down the page). Peak single precision performance gets a theoretical 10-20X boost with the addition of TensorFloat-32 (TF32) tensor cores.

Other new features include:

• Multi-instance GPU (aka MIG) which enables a single A100 GPU to be partitioned into as many as seven separate GPUs.

• Third-generation Nvidia NVLink fabric, which doubles the high-speed connectivity between GPUs.

• And structural sparsity, which introduces support for sparse matrix operations in Tensor cores, and accelerates them by two times.

Here’s a comparison chart showing key specs for Volta V100 and Ampere A100 GPUs:

Ampere – named after the French physicist and mathematician – doubles down on Nvidia’s single universal GPU strategy introduced with the Volta architecture that supported HPC, AI and graphics. “[With Ampere A100], instead of having a whole bunch of Volta GPU servers, a bunch of T4 GPU servers, and CPU servers, all of that can now be run on one unified Ampere server,” said Huang in a briefing held for media yesterday.

“This is unquestionably the first time that we’ve unified the acceleration workload of the entire datacenter into one single platform,” Huang added. “You know, everything from video analytics to image processing to voice to training to inference to data processing is now on one unified server.”

Here Huang is referring to the new DGX machine, also launched today. The DGX A100 is powered by eight A100 GPUs that together provide 320GB of memory with 12.4TB per second bandwidth. Six NVSwitches with third-generation NVLink fabric connect the GPUs, providing 4.8TB per second of bi-directional bandwidth. Each DGX 100 system offers nine Mellanox ConnectX-6 200Gb/s network interfaces and 15TB Gen4 NVMe storage.

Nvidia DGX A100 with nearly 5 petaflops FP16 peak performance (156 FP64 Tensor Core performance)

With the third-generation “DGX,” Nvidia made another noteworthy change. Instead of dual Broadwell Intel Xeons, the DGX A100 sports two 64-core AMD Epyc Rome CPUs. The move could signal Nvidia’s pushback on Intel’s emerging GPU play or may have been motivated by AMD’s price-performance story.

An Arm CPU option is also in the wings now, and with robust ongoing development activity around GPU-accelerated Arm, we would not be surprised to see another CPU shakeup in a fourth-gen DGX. Nvidia could choose an Arm server chip from Marvell or Ampere (imagine the co-branding opportunity) or it could decide to go full-bore and add an internally-developed Arm CPU to its ever-growing stack. CUDA 11 debuts full Arm64 support.

Speaking of Nvidia’s stack — with the introduction of DGX-1 four years ago on through the announced (and now completed) acquisition of Mellanox, Nvidia shied away from the systems-maker appellation, aware of the potential conflict with OEM partners. That reluctance seems to have have diminished.

A100 GPU HPC application speedups compared to NVIDIA Tesla V100 (Source: Nvidia)

“We develop vertically fully integrated systems to pioneer new form factors of computers,” said Paresh Kharya, director of product management for Nvdia’s datacenter and cloud platforms in the same media briefing. “We open the entire system as well and turn them into elemental building blocks. So our ecosystem, the entire industry can buy pieces or whole,” he continued, referencing the HGX A100 design that will be supported by partnering cloud service providers and server makers.

Huang later added, “Nvidia is really a datacenter scale computing company. We used to be a PC company 30 years ago, then we became a workstation company, then we became a server company, and we ultimately worked our way into the datacenter. But the future of computing: the datacenter is the computing unit. The future of computing is really datacenter scale; applications are going to run in the entire datacenter all at the same time.”

Nvidia also announced the creation of the DGX A100 SuperPod, spanning 140 DGX A100 systems (1,120 GPUs), 170 Mellanox Quantum 200G IB switches, 280 TB/s network fabric (over 15km of optical cable), and 4 petabyes of all-flash networked storage. The entire system delivers nearly 22 petaflops of peak double-precision performance (700 petaflops of “AI computing”) and was built in under three weeks, Nvidia said.

Nvidia has added four SuperPods to its internal supercomputer, called Saturn-V, boosting its total “AI supercomputing” capacity to nearly 5 exaflops, which Nvidia says makes Saturn-V the fastest AI supercomputer in the world. The total double-precision capacity of all those GPUs comes out to about 93 peak petaflops, but Huang clarified that Saturn-V is not really one system. It sits in four different locations under one management interface. Nvidia uses the system for software development applied to computer graphics, robotics, self-driving cars, healthcare and its new recommender system, Merlin.

DGX A100 cluster. Photo courtesy Argonne National Laboratory

But Nvidia has another reason for building Saturn-V. “If we’re a datacenter scale-company developing chips, systems and software at the datacenter scale, it stands to reason that we should build it ourselves,” said Huang.

The DGX A100 lists at $199,000 and is shipping now. The first order went to the U.S. Department of Energy’s Argonne National Lab, which is using the cluster to better understand and fight COVID-19. Other early adopters in the HPC research community include Indiana University, Jülich Supercomputing Center, Karlsruhe Institute of Technology, Max Planck Computing and Data Facility, and NERSC at the DOE’s Berkeley National Laboratory.

There is robust partner support. The list of cloud service providers and systems builders expected to integrate the A100s includes Alibaba Cloud, Amazon Web Services (AWS), Atos, Baidu Cloud, Cisco, Dell Technologies, Fujitsu, GIGABYTE, Google Cloud, H3C, Hewlett Packard Enterprise, Inspur, Lenovo, Microsoft Azure, Oracle, Quanta/QCT, Supermicro and Tencent Cloud.

The HGX A100 reference design, the backbone of the DGX A100, comes in a four- and an eight-GPU configuration. The four-GPU HGX A100 offers full interconnection between GPUs with NVLink, while the eight-GPU version provides full GPU-to-GPU bandwidth through NVSwitch. With the new multi-instance GPU (MIG) architecture, the Ampere servers, as we heard Huang call them, can be configured as 56 small GPUs for inferencing or as eight GPUs working together for training or HPC workloads.

Subscribe to HPCwire's Weekly Update!

Be the most informed person in the room! Stay ahead of the tech trends with industy updates delivered to you every week!

Rockport Networks Launches 300 Gbps Switchless Fabric, Reveals 396-Node Deployment at TACC

October 27, 2021

Rockport Networks emerged from stealth this week with the launch of its 300 Gbps switchless networking architecture focused on the needs of the high-performance computing and the advanced-scale AI market. Early customers Read more…

AWS Adds Gaudi-Powered, ML-Optimized EC2 DL1 Instances, Now in GA

October 27, 2021

As machine learning becomes a dominating use case for local and cloud computing, companies are racing to provide solutions specifically optimized and accelerated for AI applications. Now, Amazon Web Services (AWS) is int Read more…

Fireside Chat with LBNL’s Advanced Quantum Testbed Director

October 26, 2021

Last week, Irfan Siddiqi led a “fireside chat” with a few media and analysts to introduce the Department of Energy’s relatively new Advanced Quantum Testbed (AQT), which is based at Lawrence Berkeley National Labor Read more…

Graphcore Introduces Larger-Than-Ever IPU-Based Pods

October 22, 2021

After launching its second-generation intelligence processing units (IPUs) in 2020, four years after emerging from stealth, Graphcore is now boosting its product line with its largest commercially-available IPU-based sys Read more…

Quantum Chemistry Project to Be Among the First on EuroHPC’s LUMI System

October 22, 2021

Finland’s CSC has just installed the first module of LUMI, a 550-peak petaflops system supported by the European Union’s EuroHPC Joint Undertaking. While LUMI -- pictured in the header -- isn’t slated to complete i Read more…

AWS Solution Channel

Royalty-free stock illustration ID: 577238446

Putting bitrates into perspective

Recently, we talked about the advances NICE DCV has made to push pixels from cloud-hosted desktops or applications over the internet even more efficiently than before. Read more…

Killer Instinct: AMD’s Multi-Chip MI200 GPU Readies for a Major Global Debut

October 21, 2021

AMD’s next-generation supercomputer GPU is on its way – and by all appearances, it’s about to make a name for itself. The AMD Radeon Instinct MI200 GPU (a successor to the MI100) will, over the next year, begin to power three massive systems on three continents: the United States’ exascale Frontier system; the European Union’s pre-exascale LUMI system; and Australia’s petascale Setonix system. Read more…

Rockport Networks Launches 300 Gbps Switchless Fabric, Reveals 396-Node Deployment at TACC

October 27, 2021

Rockport Networks emerged from stealth this week with the launch of its 300 Gbps switchless networking architecture focused on the needs of the high-performance Read more…

AWS Adds Gaudi-Powered, ML-Optimized EC2 DL1 Instances, Now in GA

October 27, 2021

As machine learning becomes a dominating use case for local and cloud computing, companies are racing to provide solutions specifically optimized and accelerate Read more…

Fireside Chat with LBNL’s Advanced Quantum Testbed Director

October 26, 2021

Last week, Irfan Siddiqi led a “fireside chat” with a few media and analysts to introduce the Department of Energy’s relatively new Advanced Quantum Testb Read more…

Killer Instinct: AMD’s Multi-Chip MI200 GPU Readies for a Major Global Debut

October 21, 2021

AMD’s next-generation supercomputer GPU is on its way – and by all appearances, it’s about to make a name for itself. The AMD Radeon Instinct MI200 GPU (a successor to the MI100) will, over the next year, begin to power three massive systems on three continents: the United States’ exascale Frontier system; the European Union’s pre-exascale LUMI system; and Australia’s petascale Setonix system. Read more…

D-Wave Embraces Gate-Based Quantum Computing; Charts Path Forward

October 21, 2021

Earlier this month D-Wave Systems, the quantum computing pioneer that has long championed quantum annealing-based quantum computing (and sometimes taken heat fo Read more…

LLNL Prepares the Water and Power Infrastructure for El Capitan

October 21, 2021

When it’s (ostensibly) ready in early 2023, El Capitan is expected to deliver in excess of two exaflops of peak computing power – around four times the powe Read more…

Intel Reorgs HPC Group, Creates Two ‘Super Compute’ Groups

October 15, 2021

Following on changes made in June that moved Intel’s HPC unit out of the Data Platform Group and into the newly created Accelerated Computing Systems and Graphics (AXG) business unit, led by Raja Koduri, Intel is making further updates to the HPC group and announcing... Read more…

Quantum Workforce – NSTC Report Highlights Need for International Talent

October 13, 2021

Attracting and training the needed quantum workforce to fuel the ongoing quantum information sciences (QIS) revolution is a hot topic these days. Last week, the U.S. National Science and Technology Council issued a report – The Role of International Talent in Quantum Information Science... Read more…

Enter Dojo: Tesla Reveals Design for Modular Supercomputer & D1 Chip

August 20, 2021

Two months ago, Tesla revealed a massive GPU cluster that it said was “roughly the number five supercomputer in the world,” and which was just a precursor to Tesla’s real supercomputing moonshot: the long-rumored, little-detailed Dojo system. Read more…

Esperanto, Silicon in Hand, Champions the Efficiency of Its 1,092-Core RISC-V Chip

August 27, 2021

Esperanto Technologies made waves last December when it announced ET-SoC-1, a new RISC-V-based chip aimed at machine learning that packed nearly 1,100 cores onto a package small enough to fit six times over on a single PCIe card. Now, Esperanto is back, silicon in-hand and taking aim... Read more…

US Closes in on Exascale: Frontier Installation Is Underway

September 29, 2021

At the Advanced Scientific Computing Advisory Committee (ASCAC) meeting, held by Zoom this week (Sept. 29-30), it was revealed that the Frontier supercomputer is currently being installed at Oak Ridge National Laboratory in Oak Ridge, Tenn. The staff at the Oak Ridge Leadership... Read more…

Intel Reorgs HPC Group, Creates Two ‘Super Compute’ Groups

October 15, 2021

Following on changes made in June that moved Intel’s HPC unit out of the Data Platform Group and into the newly created Accelerated Computing Systems and Graphics (AXG) business unit, led by Raja Koduri, Intel is making further updates to the HPC group and announcing... Read more…

Ahead of ‘Dojo,’ Tesla Reveals Its Massive Precursor Supercomputer

June 22, 2021

In spring 2019, Tesla made cryptic reference to a project called Dojo, a “super-powerful training computer” for video data processing. Then, in summer 2020, Tesla CEO Elon Musk tweeted: “Tesla is developing a [neural network] training computer... Read more…

Intel Completes LLVM Adoption; Will End Updates to Classic C/C++ Compilers in Future

August 10, 2021

Intel reported in a blog this week that its adoption of the open source LLVM architecture for Intel’s C/C++ compiler is complete. The transition is part of In Read more…

Hot Chips: Here Come the DPUs and IPUs from Arm, Nvidia and Intel

August 25, 2021

The emergence of data processing units (DPU) and infrastructure processing units (IPU) as potentially important pieces in cloud and datacenter architectures was Read more…

AMD-Xilinx Deal Gains UK, EU Approvals — China’s Decision Still Pending

July 1, 2021

AMD’s planned acquisition of FPGA maker Xilinx is now in the hands of Chinese regulators after needed antitrust approvals for the $35 billion deal were receiv Read more…

Leading Solution Providers

Contributors

HPE Wins $2B GreenLake HPC-as-a-Service Deal with NSA

September 1, 2021

In the heated, oft-contentious, government IT space, HPE has won a massive $2 billion contract to provide HPC and AI services to the United States’ National Security Agency (NSA). Following on the heels of the now-canceled $10 billion JEDI contract (reissued as JWCC) and a $10 billion... Read more…

Intel Unveils New Node Names; Sapphire Rapids Is Now an ‘Intel 7’ CPU

July 27, 2021

What's a preeminent chip company to do when its process node technology lags the competition by (roughly) one generation, but outmoded naming conventions make i Read more…

Quantum Roundup: IBM, Rigetti, Phasecraft, Oxford QC, China, and More

July 13, 2021

IBM yesterday announced a proof for a quantum ML algorithm. A week ago, it unveiled a new topology for its quantum processors. Last Friday, the Technical Univer Read more…

The Latest MLPerf Inference Results: Nvidia GPUs Hold Sway but Here Come CPUs and Intel

September 22, 2021

The latest round of MLPerf inference benchmark (v 1.1) results was released today and Nvidia again dominated, sweeping the top spots in the closed (apples-to-ap Read more…

10nm, 7nm, 5nm…. Should the Chip Nanometer Metric Be Replaced?

June 1, 2020

The biggest cool factor in server chips is the nanometer. AMD beating Intel to a CPU built on a 7nm process node* – with 5nm and 3nm on the way – has been i Read more…

Frontier to Meet 20MW Exascale Power Target Set by DARPA in 2008

July 14, 2021

After more than a decade of planning, the United States’ first exascale computer, Frontier, is set to arrive at Oak Ridge National Laboratory (ORNL) later this year. Crossing this “1,000x” horizon required overcoming four major challenges: power demand, reliability, extreme parallelism and data movement. Read more…

Julia Update: Adoption Keeps Climbing; Is It a Python Challenger?

January 13, 2021

The rapid adoption of Julia, the open source, high level programing language with roots at MIT, shows no sign of slowing according to data from Julialang.org. I Read more…

D-Wave Embraces Gate-Based Quantum Computing; Charts Path Forward

October 21, 2021

Earlier this month D-Wave Systems, the quantum computing pioneer that has long championed quantum annealing-based quantum computing (and sometimes taken heat fo Read more…

  • arrow
  • Click Here for More Headlines
  • arrow
HPCwire