Stampede1 Reborn as BigTex, a Supercomputer for the Federal Reserve

By Aaron Dubrow

June 18, 2020

Alex Richter, a research economist from the Federal Reserve Bank of Dallas, seeks to unravel the non-linear impacts of the business cycle and monetary policy.

His research requires advanced computing to solve complicated mathematical and statistical problems. For several years, he used the modest-sized high performance computing cluster operated by the Federal Reserve Bank of Kansas City, the Ganymede cluster at the University of Texas at Dallas, as well as Stampede1 and Stampede2 at the Texas Advanced Computing Center (TACC). But he found himself needing more compute time. Moreover, he suspected there were many other research economists in the Federal Reserve System who could benefit additional computing resources.

Knowing that TACC — 200 miles south in Austin — operated several of the world’s largest supercomputers for open science research, in July 2017, Richter travelled to the center to see if he and his colleagues could gain greater access to the supercomputers there.

“I originally went down there thinking, since we’re in Dallas, and TACC is in Austin, maybe there’s a way that we could have some sort of partnership where we could get dedicated access to use Stampede,” Richter said.

He met with Dan Stanzione, TACC’s executive director, and, during a tour of the data center, noticed that several racks that had previously been part of Stampede1 were unplugged.

Cold-aisle containment for BigTex. (Credit: TACC)

The system — an Intel/Dell supercomputer with a peak speed of nearly 10 petaflops that debuted in 2012 as the seventh most powerful machine in the world — had recently been decommissioned, he learned. Twenty racks were available for donation. Would Richter be interested in taking them?

Richter was intrigued, but the idea was not without its challenges. For one, the Federal Reserve of Dallas did not have the IT support needed to set up and run the machines, nor a data center to host it.

However, Richter was undeterred. The Federal Reserve accepted the donated equipment, and he spearheaded an effort to get support for a proof-of-concept experiment. TACC would provide the hardware; Chris Simmons, UT Dallas head of research computing, would provide user support and assistance in standing up the machine; the Dallas Fed would establish a hosting environment. The end result of this collaboration would allow Federal Reserve economists from across the country to be able to use the system.

The Dallas Fed rented out space in a local datacenter, purchased two new servers to serve as a master login node and a temporary storage system, and set about creating BigTex, a supercomputer for Federal Reserve economists.

Economists Compute

Previously, the Federal Reserve System had operated several high performance computing environments that contained, in total, about 5,400 compute cores. BigTex, which came online in July 2019, added 15,000 cores — or about 3 times the capacity.

The Federal Reserve is the largest employer of research economists in the U.S. with 400 PhD-level staff. In less than a year, eight of the 13 Federal Reserve banks have signed up to use BigTex and 60 of the 400 economists have used the system to date.

Some researchers, including Richter, are using BigTex to model the non-linear impacts of policy decisions or shocks to the system. In the past, economic models either assumed simplified, linear effects to changes in interest rates or the state of the economy. But with BigTex, researchers are able to tackle more realistic scenarios.

A recent paper from Richter and his collaborators forthcoming in the Journal of Monetary Economics explores various algorithms for estimating non-linear models in cases where the short-term nominal interest rate sinks to zero, creating a ‘kink’ in most models.

“The study asks how well nonlinear solution and estimation techniques compare to linear and quasi-linear methods” Richter said. “It was our most numerically intensive project to date.”

A team from the Federal Reserve of New York, led by Marco Del Negro, is developing algorithms that allow one to quickly update previously trained and tested estimators using new data. This allows economists to rapidly determine what an outcome of a new economic decision could be based on the latest information, without having to re-analyze decades of data. These algorithms make heavy use of parallel computing and hence of BigTex.

They described their results in the Federal Reserve Bank of New York Staff Reports, August 2019.

“BigTex was a game-changer for us,” Del Negro said. “Without it we could have never finished our project.”

Serdar Birinci, an economist with the Federal Reserve Bank of St. Louis, has been exploring the best possible design of unemployment insurance (UI) payments during recessions and expansions. A more generous UI system mitigates the negative effects of job loss, but at the same time incentives staying unemployed. Using BigTex, he found that the best design of the system features more generous payment amounts and much longer payment durations in recessions, as in European policies.

“Analyzing the best design of UI system requires solving a complex economic model under different values of UI replacement rates and UI payment durations,” Birinci said. “A joint determination of these two policy instruments requires solving the model thousands of times. Without having access to BigTex, this would be almost impossible.”

“My colleagues are really happy with BigTex,” Richter said. “It opens the door to research that was previously not able to be done. It’s more efficient and people are benefitting.”

The burgeoning relationship with UT Dallas, TACC, and data center operators is another success. “The fact that we built these partnerships is a very big deal,” he said. “We took an initiative at the local level and turned it into something that has benefited the organization at the national level.”

Not only does the research help economists at the Federal Reserve — it serves as a model for economics researchers in academia and industry.

“TACC produces pie charts of who’s using their resources. One thing that stands out… economists aren’t in them,” Richter said. “It’s important to get more economists and social scientists into the advanced computing fold. I think that’s something worth continuing.”

Header image: BigTex at Flexential Plano data center.

About the Author

Aaron Dubrow is a Science And Technology Writer with the Communications, Media & Design Group at the Texas Advanced Computing Center.

Subscribe to HPCwire's Weekly Update!

Be the most informed person in the room! Stay ahead of the tech trends with industy updates delivered to you every week!

Red Hat’s Disruption of CentOS Unleashes Storm of Dissent

January 22, 2021

Five weeks after angering much of the CentOS Linux developer community by unveiling controversial changes to the no-cost CentOS operating system, Red Hat has unveiled alternatives for affected users that give them severa Read more…

By Todd R. Weiss

China Unveils First 7nm Chip: Big Island

January 22, 2021

Shanghai Tianshu Zhaoxin Semiconductor Co. is claiming China’s first 7-nanometer chip, described as a leading-edge, general-purpose cloud computing chip based on a proprietary GPU architecture. Dubbed “Big Island Read more…

By George Leopold

HiPEAC Keynote: In-Memory Computing Steps Closer to Practical Reality

January 21, 2021

Pursuit of in-memory computing has long been an active area with recent progress showing promise. Just how in-memory computing works, how close it is to practical application, and what are some of the key opportunities a Read more…

By John Russell

HiPEAC’s Vision for a New Cyber Era, a ‘Continuum of Computing’

January 21, 2021

Earlier this week (Jan. 19), HiPEAC — the European Network on High Performance and Embedded Architecture and Compilation — published the 8th edition of the HiPEAC Vision, detailing an increasingly interconnected computing landscape where complex tasks are carried out across multiple... Read more…

By Tiffany Trader

Supercomputers Assist Hunt for Mysterious Axion Particle

January 21, 2021

In the 1970s, scientists theorized the existence of axions: particles born in the hearts of stars that, when exposed to a magnetic field, become light particles, and which may even comprise dark matter. To date, however, Read more…

By Oliver Peckham

AWS Solution Channel

Fire Dynamics Simulation CFD workflow on AWS

Modeling fires is key for many industries, from the design of new buildings, defining evacuation procedures for trains, planes and ships, and even the spread of wildfires. Read more…

Intel® HPC + AI Pavilion

Intel Keynote Address

Intel is the foundation of HPC – from the workstation to the cloud to the backbone of the Top500. At SC20, Intel’s Trish Damkroger, VP and GM of high performance computing, addresses the audience to show how Intel and its partners are building the future of HPC today, through hardware and software technologies that accelerate the broad deployment of advanced HPC systems. Read more…

Researchers Train Fluid Dynamics Neural Networks on Supercomputers

January 21, 2021

Fluid dynamics simulations are critical for applications ranging from wind turbine design to aircraft optimization. Running these simulations through direct numerical simulations, however, is computationally costly. Many Read more…

By Oliver Peckham

Red Hat’s Disruption of CentOS Unleashes Storm of Dissent

January 22, 2021

Five weeks after angering much of the CentOS Linux developer community by unveiling controversial changes to the no-cost CentOS operating system, Red Hat has un Read more…

By Todd R. Weiss

HiPEAC Keynote: In-Memory Computing Steps Closer to Practical Reality

January 21, 2021

Pursuit of in-memory computing has long been an active area with recent progress showing promise. Just how in-memory computing works, how close it is to practic Read more…

By John Russell

HiPEAC’s Vision for a New Cyber Era, a ‘Continuum of Computing’

January 21, 2021

Earlier this week (Jan. 19), HiPEAC — the European Network on High Performance and Embedded Architecture and Compilation — published the 8th edition of the HiPEAC Vision, detailing an increasingly interconnected computing landscape where complex tasks are carried out across multiple... Read more…

By Tiffany Trader

Saudi Aramco Unveils Dammam 7, Its New Top Ten Supercomputer

January 21, 2021

By revenue, oil and gas giant Saudi Aramco is one of the largest companies in the world, and it has historically employed commensurate amounts of supercomputing Read more…

By Oliver Peckham

President-elect Biden Taps Eric Lander and Deep Team on Science Policy

January 19, 2021

Last Friday U.S. President-elect Joe Biden named The Broad Institute founding director and president Eric Lander as his science advisor and as director of the Office of Science and Technology Policy. Lander, 63, is a mathematician by training and distinguished life sciences... Read more…

By John Russell

Pat Gelsinger Returns to Intel as CEO

January 14, 2021

The Intel board of directors has appointed a new CEO. Intel alum Pat Gelsinger is leaving his post as CEO of VMware to rejoin the company that he parted ways with 11 years ago. Gelsinger will succeed Bob Swan, who will remain CEO until Feb. 15. Gelsinger previously spent 30 years... Read more…

By Tiffany Trader

Julia Update: Adoption Keeps Climbing; Is It a Python Challenger?

January 13, 2021

The rapid adoption of Julia, the open source, high level programing language with roots at MIT, shows no sign of slowing according to data from Julialang.org. I Read more…

By John Russell

Intel ‘Ice Lake’ Server Chips in Production, Set for Volume Ramp This Quarter

January 12, 2021

Intel Corp. used this week’s virtual CES 2021 event to reassert its dominance of the datacenter with the formal roll out of its next-generation server chip, the 10nm Xeon Scalable processor that targets AI and HPC workloads. The third-generation “Ice Lake” family... Read more…

By George Leopold

Esperanto Unveils ML Chip with Nearly 1,100 RISC-V Cores

December 8, 2020

At the RISC-V Summit today, Art Swift, CEO of Esperanto Technologies, announced a new, RISC-V based chip aimed at machine learning and containing nearly 1,100 low-power cores based on the open-source RISC-V architecture. Esperanto Technologies, headquartered in... Read more…

By Oliver Peckham

Julia Update: Adoption Keeps Climbing; Is It a Python Challenger?

January 13, 2021

The rapid adoption of Julia, the open source, high level programing language with roots at MIT, shows no sign of slowing according to data from Julialang.org. I Read more…

By John Russell

Azure Scaled to Record 86,400 Cores for Molecular Dynamics

November 20, 2020

A new record for HPC scaling on the public cloud has been achieved on Microsoft Azure. Led by Dr. Jer-Ming Chia, the cloud provider partnered with the Beckman I Read more…

By Oliver Peckham

NICS Unleashes ‘Kraken’ Supercomputer

April 4, 2008

A Cray XT4 supercomputer, dubbed Kraken, is scheduled to come online in mid-summer at the National Institute for Computational Sciences (NICS). The soon-to-be petascale system, and the resulting NICS organization, are the result of an NSF Track II award of $65 million to the University of Tennessee and its partners to provide next-generation supercomputing for the nation's science community. Read more…

Is the Nvidia A100 GPU Performance Worth a Hardware Upgrade?

October 16, 2020

Over the last decade, accelerators have seen an increasing rate of adoption in high-performance computing (HPC) platforms, and in the June 2020 Top500 list, eig Read more…

By Hartwig Anzt, Ahmad Abdelfattah and Jack Dongarra

Aurora’s Troubles Move Frontier into Pole Exascale Position

October 1, 2020

Intel’s 7nm node delay has raised questions about the status of the Aurora supercomputer that was scheduled to be stood up at Argonne National Laboratory next year. Aurora was in the running to be the United States’ first exascale supercomputer although it was on a contemporaneous timeline with... Read more…

By Tiffany Trader

10nm, 7nm, 5nm…. Should the Chip Nanometer Metric Be Replaced?

June 1, 2020

The biggest cool factor in server chips is the nanometer. AMD beating Intel to a CPU built on a 7nm process node* – with 5nm and 3nm on the way – has been i Read more…

By Doug Black

Programming the Soon-to-Be World’s Fastest Supercomputer, Frontier

January 5, 2021

What’s it like designing an app for the world’s fastest supercomputer, set to come online in the United States in 2021? The University of Delaware’s Sunita Chandrasekaran is leading an elite international team in just that task. Chandrasekaran, assistant professor of computer and information sciences, recently was named... Read more…

By Tracey Bryant

Leading Solution Providers

Contributors

Top500: Fugaku Keeps Crown, Nvidia’s Selene Climbs to #5

November 16, 2020

With the publication of the 56th Top500 list today from SC20's virtual proceedings, Japan's Fugaku supercomputer – now fully deployed – notches another win, Read more…

By Tiffany Trader

Texas A&M Announces Flagship ‘Grace’ Supercomputer

November 9, 2020

Texas A&M University has announced its next flagship system: Grace. The new supercomputer, named for legendary programming pioneer Grace Hopper, is replacing the Ada system (itself named for mathematician Ada Lovelace) as the primary workhorse for Texas A&M’s High Performance Research Computing (HPRC). Read more…

By Oliver Peckham

At Oak Ridge, ‘End of Life’ Sometimes Isn’t

October 31, 2020

Sometimes, the old dog actually does go live on a farm. HPC systems are often cursed with short lifespans, as they are continually supplanted by the latest and Read more…

By Oliver Peckham

Gordon Bell Special Prize Goes to Massive SARS-CoV-2 Simulations

November 19, 2020

2020 has proven a harrowing year – but it has produced remarkable heroes. To that end, this year, the Association for Computing Machinery (ACM) introduced the Read more…

By Oliver Peckham

Nvidia and EuroHPC Team for Four Supercomputers, Including Massive ‘Leonardo’ System

October 15, 2020

The EuroHPC Joint Undertaking (JU) serves as Europe’s concerted supercomputing play, currently comprising 32 member states and billions of euros in funding. I Read more…

By Oliver Peckham

Intel Xe-HP GPU Deployed for Aurora Exascale Development

November 17, 2020

At SC20, Intel announced that it is making its Xe-HP high performance discrete GPUs available to early access developers. Notably, the new chips have been deplo Read more…

By Tiffany Trader

Nvidia-Arm Deal a Boon for RISC-V?

October 26, 2020

The $40 billion blockbuster acquisition deal that will bring chipmaker Arm into the Nvidia corporate family could provide a boost for the competing RISC-V architecture. As regulators in the U.S., China and the European Union begin scrutinizing the impact of the blockbuster deal on semiconductor industry competition and innovation, the deal has at the very least... Read more…

By George Leopold

HPE, AMD and EuroHPC Partner for Pre-Exascale LUMI Supercomputer

October 21, 2020

Not even a week after Nvidia announced that it would be providing hardware for the first four of the eight planned EuroHPC systems, HPE and AMD are announcing a Read more…

By Oliver Peckham

  • arrow
  • Click Here for More Headlines
  • arrow
Do NOT follow this link or you will be banned from the site!
Share This