Hardware Acceleration of Recurrent Neural Networks: the Need and the Challenges

By Sparsh Mittal

July 27, 2020

Recurrent neural networks (RNNs) have shown phenomenal success in several sequence learning tasks such as machine translation, language processing, image captioning, scene labeling, action recognition, time-series forecasting, and music generation. No doubt, CNNs are the most popular neural networks, but RNNs are no less important. This fact is evident from the fact that in 2016 and 2020, RNNs accounted for 29% and 21% of the TPU (tensor processing unit) workloads run in Google datacenters. RNN training involves a large number of epochs for convergence, which increases the training time and energy overheads. During RNN inference, the dataflow graph of RNN changes based on the input. These factors make underscore the need to accelerate RNNs.

RNN acceleration is no easy joke

RNN computations involve both intra-timestep and inter-timestep dependencies. These dependencies lead to poor hardware utilization and low performance. For example, the dominant computation-pattern of convolution layers is matrix-matrix multiplication, whereas that of RNNs is matrix-vector multiplication. This also means that RNNs have less data-reuse. Further, in their ISCA 2017 paper, Google researchers have compared the performance of MLP (multi-layer perceptron), CNN and LSTM (long short term memory) models on Google’s TPU version 1 which can provide a peak-performance of 92 TOPS/sec. They observed that while CNN0 achieved a performance 86 TOPS/sec, LSTM0 and LSTM1 achieved only 3.7 and 2.8 TOPS/sec, respectively.  Evidently, the hardware acceleration of RNNs is more challenging than that of CNNs.

GPU, FPGA and ASIC: Using all arrows in the quiver

TPU v3 (image: Google Cloud)

Since all the three computing systems have their own forte, researchers have optimized or designed accelerators using all the three systems. The recent paper I’ve co-authored with Sumanth Umesh (A Survey on Hardware Accelerators and Optimization Techniques for RNNs) reviews state-of-the-art accelerators from both academia and industry. Some of the commercial designs we reviewed include Brainwave (Microsoft), Intelligence Processing Unit (IPU, from Graphcore), TPU v1/v2/v3 (Google), and Volta GPU (NVIDIA). The core-computation engine of these accelerators performs multiplication between vector-scalar, vector-vector, matrix-vector, and matrix-matrix. Of these, we found matrix-vector multiplication engines to be the most widely used, which is also expected since this is the key computation pattern of RNNs. Note that the computation engine used in Brainwave is matrix-vector multiplication, whereas that in TPU, IPU, and tensor cores of Volta GPU is matrix-matrix multiplication.

Our RNN is frittered away by details. Simplify! Simplify!

The fact that RNNs are used for error-tolerant applications provides an opportunity to trade off their accuracy to gain efficiency. For example, hardware-aware pruning, low-precision, and even variable-precision have been shown to provide substantial gains in throughput and energy-efficiency of RNNs. An exemplar hardware-aware pruning technique divides each row of the weight matrix into sub-rows and performs pruning such that the number of non-zero weights is equal in all the sub-rows. This approach balances the workload of each row, which reduces memory contention and allows exploiting parallelism. Further, unlike coarse-grain pruning techniques, this approach does not sacrifice accuracy. The variable-precision technique works by using low-precision when the LSTM cell-state changes slowly and high-precision when the LSTM cell-state shows rapid changes over time. It is noteworthy that low-precision formats such as BF16 are now supported on these accelerators and even the latest CPUs.

Further, it is well-known that a sentence can be summarized without processing all the words of the sentence, and the caption of a video may be generated without seeing all the video frames. Several techniques use these observations to skip unimportant or nearly-similar frames or words to accelerate RNN processing. Some researchers leverage the semantic correlation between the words of a sentence. For example, in the sentence completion task, if the present word is “He,” the following word is more likely to be “is” than “teach,” “are,” or “your.” Based on this correlation, the processing of different words can be speculatively parallelized.

CNN or RNN or both?

Many real-world applications such as “long-term recurrent convolutional networks” (LRCN) used for visual recognition and description, and SHOWTELL used for image captioning, use both CNNs and RNNs. Whether you are a data-center administrator or an end-user, you will most likely deal with CNNs and RNNs and even other deep-learning models. This fact is also evident from the development of benchmark suites such as MLPerf and Fathom, which include a diverse range of machine-learning models. As such, optimizing for either CNN or RNN alone is likely to provide limited gains. In fact, next-generation architectures must be examined based on a wide range of models.

The path ahead

While CNN has a limited receptive field, RNN theoretically offers an infinite receptive field. However, the limitation of RNN is its sequentiality, which means that RNN processes an input step-by-step. Since “attention mechanism” offers constant path length, it overcomes the limitations of both RNN and CNN. For this reason, the “attention mechanism” has drawn a lot of attention in recent years. For example, Google’s “neural machine translation” technique places an attention network between encoding and decoding LSTM layers. After all, deep-learning is a fast-moving field, and as deep-learning algorithms evolve, their system architectures must also change. There are a need and scope of achieving greater synergy between the efforts of researchers in the area of deep learning, computer architecture, and high-performance computing.

About the Author

Dr. Sparsh Mittal is currently working as an assistant professor at IIT Roorkee, India. He received the B.Tech. degree from IIT, Roorkee, India and the Ph.D. degree from Iowa State University (ISU), USA. He has worked as a Post-Doctoral Research Associate at Oak Ridge National Lab (ORNL), USA and as an assistant professor at CSE, IIT Hyderabad. He was the graduating topper of his batch in B.Tech and his BTech project received the best project award. He has received a fellowship from ISU and a performance award from ORNL. He has published more than 90 papers at top venues. He is an associate editor of Elsevier’s Journal of Systems Architecture. He has given invited talks at ISC Conference at Germany, New York University, University of Michigan and Xilinx (Hyderabad).

 

 

 

 

Subscribe to HPCwire's Weekly Update!

Be the most informed person in the room! Stay ahead of the tech trends with industy updates delivered to you every week!

Research: A Survey of Numerical Methods Utilizing Mixed Precision Arithmetic

August 5, 2020

Within the past years, hardware vendors have started designing low precision special function units in response to the demand of the machine learning community and their demand for high compute power in low precision for Read more…

By Hartwig Anzt and Jack Dongarra

Implement Photonic Tensor Cores for Machine Learning?

August 5, 2020

Researchers from George Washington University have reported an approach for building photonic tensor cores that leverages phase change photonic memory to implement a neural network (NN). Their novel architecture, reporte Read more…

By John Russell

HPE Keeps Cray Brand Promise, Reveals HPE Cray Supercomputing Line

August 4, 2020

The HPC community, ever-affectionate toward Cray and its eponymous founder, can breathe a (virtual) sigh of relief. The Cray brand will live on, encompassing the pinnacle of HPE's HPC portfolio. After announcing its i Read more…

By Tiffany Trader

Machines, Connections, Data, and Especially People: OAC Acting Director Amy Friedlander Charts Office’s Blueprint for Innovation

August 3, 2020

The path to innovation in cyberinfrastructure (CI) will require continued focus on building HPC systems and secure connections between them, in addition to the increasingly important goals of data best practices and work Read more…

By Ken Chiacchia, Pittsburgh Supercomputing Center/XSEDE

Nvidia Said to Be Close on Arm Deal

August 3, 2020

GPU leader Nvidia Corp. is in talks to buy U.K. chip designer Arm from parent company Softbank, according to several reports over the weekend. If consummated, analysts said the acquisition would cement Nvidia’s stat Read more…

By George Leopold

AWS Solution Channel

AWS announces the release of AWS ParallelCluster 2.8.0

AWS ParallelCluster is a fully supported and maintained open source cluster management tool that makes it easy for scientists, researchers, and IT administrators to deploy and manage High Performance Computing (HPC) clusters in the AWS cloud. Read more…

Intel® HPC + AI Pavilion

Supercomputing the Pandemic: Scientific Community Tackles COVID-19 from Multiple Perspectives

Since their inception, supercomputers have taken on the biggest, most complex, and most data-intensive computing challenges—from confirming Einstein’s theories about gravitational waves to predicting the impacts of climate change. Read more…

Summer Reading: Here’s a Quantum Advantage You Can Bet On!

August 3, 2020

While quantum computing researchers today vigorously chase a demonstration of a quantum advantage – an application which when run on a quantum computer provides sufficient advantage to warrant switching from a classica Read more…

By John Russell

HPE Keeps Cray Brand Promise, Reveals HPE Cray Supercomputing Line

August 4, 2020

The HPC community, ever-affectionate toward Cray and its eponymous founder, can breathe a (virtual) sigh of relief. The Cray brand will live on, encompassing th Read more…

By Tiffany Trader

Machines, Connections, Data, and Especially People: OAC Acting Director Amy Friedlander Charts Office’s Blueprint for Innovation

August 3, 2020

The path to innovation in cyberinfrastructure (CI) will require continued focus on building HPC systems and secure connections between them, in addition to the Read more…

By Ken Chiacchia, Pittsburgh Supercomputing Center/XSEDE

Nvidia Said to Be Close on Arm Deal

August 3, 2020

GPU leader Nvidia Corp. is in talks to buy U.K. chip designer Arm from parent company Softbank, according to several reports over the weekend. If consummated Read more…

By George Leopold

Intel’s 7nm Slip Raises Questions About Ponte Vecchio GPU, Aurora Supercomputer

July 30, 2020

During its second-quarter earnings call, Intel announced a one-year delay of its 7nm process technology, which it says it will create an approximate six-month shift for its CPU product timing relative to prior expectations. The primary issue is a defect mode in the 7nm process that resulted in yield degradation... Read more…

By Tiffany Trader

PEARC20 Plenary Introduces Five Upcoming NSF-Funded HPC Systems

July 30, 2020

Five new HPC systems—three National Science Foundation-funded “Capacity” systems and two “Innovative Prototype/Testbed” systems—will be coming onlin Read more…

By Ken Chiacchia, Pittsburgh Supercomputing Center/XSEDE

Nvidia Dominates Latest MLPerf Training Benchmark Results

July 29, 2020

MLPerf.org released its third round of training benchmark (v0.7) results today and Nvidia again dominated, claiming 16 new records. Meanwhile, Google provided e Read more…

By John Russell

$39 Billion Worldwide HPC Market Faces 3.7% COVID-related Drop in 2020

July 29, 2020

Global HPC market revenue reached $39 billion in 2019, growing a healthy 8.2 percent over 2018, according to the latest analysis from Intersect360 Research. A 3 Read more…

By Tiffany Trader

Agenting Change: PEARC20 Keynote Encourages Cultural Change to Make Tech Better, More Diverse

July 29, 2020

The tech world will need to become more diverse if it is to thrive and survive, said Cherri Pancake, director of the Northwest Alliance for Computational Resear Read more…

By Ken Chiacchia, Pittsburgh Supercomputing Center/XSEDE

Supercomputer Modeling Tests How COVID-19 Spreads in Grocery Stores

April 8, 2020

In the COVID-19 era, many people are treating simple activities like getting gas or groceries with caution as they try to heed social distancing mandates and protect their own health. Still, significant uncertainty surrounds the relative risk of different activities, and conflicting information is prevalent. A team of Finnish researchers set out to address some of these uncertainties by... Read more…

By Oliver Peckham

Supercomputer-Powered Research Uncovers Signs of ‘Bradykinin Storm’ That May Explain COVID-19 Symptoms

July 28, 2020

Doctors and medical researchers have struggled to pinpoint – let alone explain – the deluge of symptoms induced by COVID-19 infections in patients, and what Read more…

By Oliver Peckham

Intel’s 7nm Slip Raises Questions About Ponte Vecchio GPU, Aurora Supercomputer

July 30, 2020

During its second-quarter earnings call, Intel announced a one-year delay of its 7nm process technology, which it says it will create an approximate six-month shift for its CPU product timing relative to prior expectations. The primary issue is a defect mode in the 7nm process that resulted in yield degradation... Read more…

By Tiffany Trader

Supercomputer Simulations Reveal the Fate of the Neanderthals

May 25, 2020

For hundreds of thousands of years, neanderthals roamed the planet, eventually (almost 50,000 years ago) giving way to homo sapiens, which quickly became the do Read more…

By Oliver Peckham

10nm, 7nm, 5nm…. Should the Chip Nanometer Metric Be Replaced?

June 1, 2020

The biggest cool factor in server chips is the nanometer. AMD beating Intel to a CPU built on a 7nm process node* – with 5nm and 3nm on the way – has been i Read more…

By Doug Black

Neocortex Will Be First-of-Its-Kind 800,000-Core AI Supercomputer

June 9, 2020

Pittsburgh Supercomputing Center (PSC - a joint research organization of Carnegie Mellon University and the University of Pittsburgh) has won a $5 million award Read more…

By Tiffany Trader

Nvidia Said to Be Close on Arm Deal

August 3, 2020

GPU leader Nvidia Corp. is in talks to buy U.K. chip designer Arm from parent company Softbank, according to several reports over the weekend. If consummated Read more…

By George Leopold

Nvidia’s Ampere A100 GPU: Up to 2.5X the HPC, 20X the AI

May 14, 2020

Nvidia's first Ampere-based graphics card, the A100 GPU, packs a whopping 54 billion transistors on 826mm2 of silicon, making it the world's largest seven-nanom Read more…

By Tiffany Trader

Leading Solution Providers

Contributors

Honeywell’s Big Bet on Trapped Ion Quantum Computing

April 7, 2020

Honeywell doesn’t spring to mind when thinking of quantum computing pioneers, but a decade ago the high-tech conglomerate better known for its control systems waded deliberately into the then calmer quantum computing (QC) waters. Fast forward to March when Honeywell announced plans to introduce an ion trap-based quantum computer whose ‘performance’ would... Read more…

By John Russell

Australian Researchers Break All-Time Internet Speed Record

May 26, 2020

If you’ve been stuck at home for the last few months, you’ve probably become more attuned to the quality (or lack thereof) of your internet connection. Even Read more…

By Oliver Peckham

15 Slides on Programming Aurora and Exascale Systems

May 7, 2020

Sometime in 2021, Aurora, the first planned U.S. exascale system, is scheduled to be fired up at Argonne National Laboratory. Cray (now HPE) and Intel are the k Read more…

By John Russell

‘Billion Molecules Against COVID-19’ Challenge to Launch with Massive Supercomputing Support

April 22, 2020

Around the world, supercomputing centers have spun up and opened their doors for COVID-19 research in what may be the most unified supercomputing effort in hist Read more…

By Oliver Peckham

Joliot-Curie Supercomputer Used to Build First Full, High-Fidelity Aircraft Engine Simulation

July 14, 2020

When industrial designers plan the design of a new element of a vehicle’s propulsion or exterior, they typically use fluid dynamics to optimize airflow and in Read more…

By Oliver Peckham

$100B Plan Submitted for Massive Remake and Expansion of NSF

May 27, 2020

Legislation to reshape, expand - and rename - the National Science Foundation has been submitted in both the U.S. House and Senate. The proposal, which seems to Read more…

By John Russell

John Martinis Reportedly Leaves Google Quantum Effort

April 21, 2020

John Martinis, who led Google’s quantum computing effort since establishing its quantum hardware group in 2014, has left Google after being moved into an advi Read more…

By John Russell

Google Cloud Debuts 16-GPU Ampere A100 Instances

July 7, 2020

On the heels of the Nvidia’s Ampere A100 GPU launch in May, Google Cloud is announcing alpha availability of the A100 “Accelerator Optimized” VM A2 instance family on Google Compute Engine. The instances are powered by the HGX A100 16-GPU platform, which combines two HGX A100 8-GPU baseboards using... Read more…

By Tiffany Trader

  • arrow
  • Click Here for More Headlines
  • arrow
Do NOT follow this link or you will be banned from the site!
Share This