Intel’s 7nm Slip Raises Questions About Ponte Vecchio GPU, Aurora Supercomputer

By Tiffany Trader

July 30, 2020

During its second-quarter earnings call, Intel announced a one-year delay of its 7nm process technology, which it says will create an approximate six-month shift for its CPU product timing relative to prior expectations. The primary issue is a defect mode in the 7nm process that resulted in yield degradation, said Intel CEO Bob Swan during the July 23, 2020, earnings call.

“We’ve root-caused the issue, and believe there are no fundamental roadblocks,” said Swan. “But we’ve also invested in contingency plans to hedge against further schedule uncertainty. We’ve mitigated the impact of the process delay on our product schedule by leveraging improvements in design methodology, such as die disaggregation and advanced packaging.”

The delay in 7nm potentially puts a kink in Intel’s plans to stand up the Aurora supercomputer at Argonne National Laboratory on-schedule by the end of 2021. Intel, the prime contractor, is building the machine with HPE/Cray, using Intel’s 10nm “Sapphire Rapids” Xeon CPU and its 7nm “Xe” datacenter GPU, codenamed “Ponte Vecchio.”

As the centerpiece of Aurora, the frontrunner of the U.S. exascale program, Ponte Vecchio would herald Intel’s entry into the datacenter GPU market. The GPU was also intended to be Intel’s first 7nm product.

Ponte Vecchio’s release is now slated for “late 2021 or early 2022” and Intel is working with outside fabs on at least some elements of the GPU.

Bob Swan on the Q2 earnings call:

“We will continue to invest in our future process technology roadmap, but we will be pragmatic and objective in deploying the process technology that delivers the most predictability and performance for our customers, whether that be in our process, external foundry process or a combination of both. Our advanced packaging technologies combined with our disaggregated architecture give us tremendous flexibility to use the process technology that best serves our customers. As an example, our datacenter GPU design, Ponte Vecchio, will now be released in late 2021 or early 2022, utilizing external and internal process technologies combined with our world-leading packaging technologies.”

Swan stated the “first Intel-based 7nm product” would be a client CPU in late 2022 or early 2023.

I suppose “first Intel-based 7nm product” can be parsed creatively if not naturally (with “Intel-based” modifying the process not the product), but it’s looking like at launch Ponte Vecchio, at least the GPU die portion, will not be built on 7nm, certainly not Intel’s node since it won’t be ready until a year later. There is speculation that Intel could shift production to TSMC (or Samsung) as part of its “contingency plans.”

Aurora node design, as presented at SC19 by Intel’s Raja Koduri

Given the Department of Energy’s fixed performance and power targets for Aurora and the timeframe of late 2021 or early 2022, TSMC’s 5nm node is a likely candidate.

In the quote above, Swan references Ponte Vecchio “utilizing external and internal process technologies.” The I/O die and GPU die (and the memory stack) can be implemented on different nodes. AMD does this with its Epyc CPUs; Rome, for example, employs 7nm CPU cores and a 14nm I/O die.

From Swan again:

“Originally the architecture of Ponte Vecchio includes an I/O based die, connectivity, a GPU and some memory tiles, all kind of packaged together. That’s kind of the design of Ponte Vecchio. From the beginning, we would do some of those tiles inside and some of those tiles outside, and again leverage the packaging technology as a proof point of how do we mix and match different designs into one package. So, that was the design from the beginning… that design disaggregation gives us lots of flexibility.

“As we go forward now, we can think about whether we introduce Ponte Vecchio with… I think, I said some of those tiles are inside and outside from the beginning. Now, as we go forward, we can assess whether we swap out one of our tiles for a third-party foundry or not. Again, that’s the beauty and value of this change and design methodology that gives us much more optionality and flexibility. So, in the event there’s a process slip, we can buy something rather than make it all ourselves.”

Swan is putting a positive spin on the GPU’s disaggregated design, but swapping out the GPU compute die, as it seems like Intel will need to do, is not a minor change. The process node directly correlates to the performance and energy targets of the Ponte Vecchio GPU and by extension the Aurora system, wherein the GPU will deliver most of the performance and drive a good portion of the power demand.

Intel reported 10nm Sapphire Rapids is on track to begin shipping in the second half of 2021, and its “Intel-based 7nm datacenter CPU” is on the roadmap for the first half of 2023.

Aurora is central to the United States’ exascale plans. Its current implementation, known as Aurora21, has been positioned as the first U.S. exascale machine, although Intel has not committed publicly to a one-exaflops Linpack target.

Aurora is not the only exascale machine in development in the U.S. Oak Ridge National Lab (with HPE and AMD) is aiming to stand up the 1.5 exaflops (minimum peak) Frontier system along a contemporaneous timeframe (late 2021), and with uncertainties around Intel’s datacenter GPU execution, the odds just increased for Oak Ridge taking the lead in the United States’ exascale rollout. Lawrence Livermore National Lab (also with HPE and AMD) is looking to deploy El Capitan — slated to deliver 2 exaflops peak — one year later in late 2022. All three systems feature HPE’s Cray Shasta architecture.

Aurora was originally conceived as a pre-exascale supercomputer in 2015. The DOE CORAL contract called for a 180 petaflops (peak) machine composed of Intel Xeon Phi Knights Hill processors and second-generation OmniPath fabric technology to be stood up at Argonne in 2018. Plans were scrapped as Intel pulled back on, and eventually canceled, Phi and OmniPath development, and the contract was redefined and expanded.

Announcement of the 7nm delay contrasted with Intel’s strong second-quarter financials. The company’s second-quarter revenue of $19.7 billion was up 20 percent year-over-year. Data-centric revenue grew 34 percent, accounting for 52 percent of total revenue. Profit rose 22 percent to $5.11 billion, as reported in the Wall Street Journal, but stocks plunged 18 percent on news of the delay and lowered Q3 guidance, and at the time of this writing have not recovered.

Subscribe to HPCwire's Weekly Update!

Be the most informed person in the room! Stay ahead of the tech trends with industy updates delivered to you every week!

Faster Optical Switch that Operates at ‘Room Temp’ Developed by IBM, Skolkovo Researchers

October 19, 2021

Optical switching technology holds great promise for many applications but hot operating temperatures have been a key obstacle slowing progress. Now, a new optical switching device that can operate at room temperatures a Read more…

Energy Exascale Earth System Model Version 2 Promises Twice the Speed

October 18, 2021

The Energy Exascale Earth System Model (E3SM) is an ongoing Department of Energy (DOE) earth system modeling, simulation and prediction project aiming to “assert and maintain an international scientific leadership posi Read more…

Intel Reorgs HPC Group, Creates Two ‘Super Compute’ Groups

October 15, 2021

Following on changes made in June that moved Intel’s HPC unit out of the Data Platform Group and into the newly created Accelerated Computing Systems and Graphics (AXG) business unit, led by Raja Koduri, Intel is making further updates to the HPC group and announcing... Read more…

Royalty-free stock illustration ID: 1938746143

MosaicML, Led by Naveen Rao, Comes Out of Stealth Aiming to Ease Model Training

October 15, 2021

With more and more enterprises turning to AI for a myriad of tasks, companies quickly find out that training AI models is expensive, difficult and time-consuming. Finding a new approach to deal with those cascading challenges is the aim of a new startup, MosaicML, that just came out of stealth... Read more…

NSF Awards $11M to SDSC, MIT and Univ. of Oregon to Secure the Internet

October 14, 2021

From a security standpoint, the internet is a problem. The infrastructure developed decades ago has cracked, leaked and been patched up innumerable times, leaving vulnerabilities that are difficult to address due to cost Read more…

AWS Solution Channel

Cost optimizing Ansys LS-Dyna on AWS

Organizations migrate their high performance computing (HPC) workloads from on-premises infrastructure to Amazon Web Services (AWS) for advantages such as high availability, elastic capacity, latest processors, storage, and networking technologies; Read more…

SC21 Announces Science and Beyond Plenary: the Intersection of Ethics and HPC

October 13, 2021

The Intersection of Ethics and HPC will be the guiding topic of SC21's Science & Beyond plenary, inspired by the event tagline of the same name. The evening event will be moderated by Daniel Reed with panelists Crist Read more…

Intel Reorgs HPC Group, Creates Two ‘Super Compute’ Groups

October 15, 2021

Following on changes made in June that moved Intel’s HPC unit out of the Data Platform Group and into the newly created Accelerated Computing Systems and Graphics (AXG) business unit, led by Raja Koduri, Intel is making further updates to the HPC group and announcing... Read more…

Royalty-free stock illustration ID: 1938746143

MosaicML, Led by Naveen Rao, Comes Out of Stealth Aiming to Ease Model Training

October 15, 2021

With more and more enterprises turning to AI for a myriad of tasks, companies quickly find out that training AI models is expensive, difficult and time-consuming. Finding a new approach to deal with those cascading challenges is the aim of a new startup, MosaicML, that just came out of stealth... Read more…

Quantum Workforce – NSTC Report Highlights Need for International Talent

October 13, 2021

Attracting and training the needed quantum workforce to fuel the ongoing quantum information sciences (QIS) revolution is a hot topic these days. Last week, the U.S. National Science and Technology Council issued a report – The Role of International Talent in Quantum Information Science... Read more…

Eni Returns to HPE for ‘HPC4’ Refresh via GreenLake

October 13, 2021

Italian energy company Eni is upgrading its HPC4 system with new gear from HPE that will be installed in Eni’s Green Data Center in Ferrera Erbognone (a provi Read more…

The Blueprint for the National Strategic Computing Reserve

October 12, 2021

Over the last year, the HPC community has been buzzing with the possibility of a National Strategic Computing Reserve (NSCR). An in-utero brainchild of the COVID-19 High-Performance Computing Consortium, an NSCR would serve as a Merchant Marine for urgent computing... Read more…

UCLA Researchers Report Largest Chiplet Design and Early Prototyping

October 12, 2021

What’s the best path forward for large-scale chip/system integration? Good question. Cerebras has set a high bar with its wafer scale engine 2 (WSE-2); it has 2.6 trillion transistors, including 850,000 cores, and was fabricated using TSMC’s 7nm process on a roughly 8” x 8” silicon footprint. Read more…

What’s Next for EuroHPC: an Interview with EuroHPC Exec. Dir. Anders Dam Jensen

October 7, 2021

One year after taking the post as executive director of the EuroHPC JU, Anders Dam Jensen reviews the project's accomplishments and details what's ahead as EuroHPC's operating period has now been extended out to the year 2027. Read more…

University of Bath Unveils Janus, an Azure-Based Cloud HPC Environment

October 6, 2021

The University of Bath is upgrading its HPC infrastructure, which it says “supports a growing and wide range of research activities across the University.” Read more…

Ahead of ‘Dojo,’ Tesla Reveals Its Massive Precursor Supercomputer

June 22, 2021

In spring 2019, Tesla made cryptic reference to a project called Dojo, a “super-powerful training computer” for video data processing. Then, in summer 2020, Tesla CEO Elon Musk tweeted: “Tesla is developing a [neural network] training computer... Read more…

Enter Dojo: Tesla Reveals Design for Modular Supercomputer & D1 Chip

August 20, 2021

Two months ago, Tesla revealed a massive GPU cluster that it said was “roughly the number five supercomputer in the world,” and which was just a precursor to Tesla’s real supercomputing moonshot: the long-rumored, little-detailed Dojo system. Read more…

Esperanto, Silicon in Hand, Champions the Efficiency of Its 1,092-Core RISC-V Chip

August 27, 2021

Esperanto Technologies made waves last December when it announced ET-SoC-1, a new RISC-V-based chip aimed at machine learning that packed nearly 1,100 cores onto a package small enough to fit six times over on a single PCIe card. Now, Esperanto is back, silicon in-hand and taking aim... Read more…

US Closes in on Exascale: Frontier Installation Is Underway

September 29, 2021

At the Advanced Scientific Computing Advisory Committee (ASCAC) meeting, held by Zoom this week (Sept. 29-30), it was revealed that the Frontier supercomputer is currently being installed at Oak Ridge National Laboratory in Oak Ridge, Tenn. The staff at the Oak Ridge Leadership... Read more…

Intel Completes LLVM Adoption; Will End Updates to Classic C/C++ Compilers in Future

August 10, 2021

Intel reported in a blog this week that its adoption of the open source LLVM architecture for Intel’s C/C++ compiler is complete. The transition is part of In Read more…

Intel Reorgs HPC Group, Creates Two ‘Super Compute’ Groups

October 15, 2021

Following on changes made in June that moved Intel’s HPC unit out of the Data Platform Group and into the newly created Accelerated Computing Systems and Graphics (AXG) business unit, led by Raja Koduri, Intel is making further updates to the HPC group and announcing... Read more…

CentOS Replacement Rocky Linux Is Now in GA and Under Independent Control

June 21, 2021

The Rocky Enterprise Software Foundation (RESF) is announcing the general availability of Rocky Linux, release 8.4, designed as a drop-in replacement for the soon-to-be discontinued CentOS. The GA release is launching six-and-a-half months... Read more…

Hot Chips: Here Come the DPUs and IPUs from Arm, Nvidia and Intel

August 25, 2021

The emergence of data processing units (DPU) and infrastructure processing units (IPU) as potentially important pieces in cloud and datacenter architectures was Read more…

Leading Solution Providers

Contributors

AMD-Xilinx Deal Gains UK, EU Approvals — China’s Decision Still Pending

July 1, 2021

AMD’s planned acquisition of FPGA maker Xilinx is now in the hands of Chinese regulators after needed antitrust approvals for the $35 billion deal were receiv Read more…

HPE Wins $2B GreenLake HPC-as-a-Service Deal with NSA

September 1, 2021

In the heated, oft-contentious, government IT space, HPE has won a massive $2 billion contract to provide HPC and AI services to the United States’ National Security Agency (NSA). Following on the heels of the now-canceled $10 billion JEDI contract (reissued as JWCC) and a $10 billion... Read more…

10nm, 7nm, 5nm…. Should the Chip Nanometer Metric Be Replaced?

June 1, 2020

The biggest cool factor in server chips is the nanometer. AMD beating Intel to a CPU built on a 7nm process node* – with 5nm and 3nm on the way – has been i Read more…

Julia Update: Adoption Keeps Climbing; Is It a Python Challenger?

January 13, 2021

The rapid adoption of Julia, the open source, high level programing language with roots at MIT, shows no sign of slowing according to data from Julialang.org. I Read more…

Quantum Roundup: IBM, Rigetti, Phasecraft, Oxford QC, China, and More

July 13, 2021

IBM yesterday announced a proof for a quantum ML algorithm. A week ago, it unveiled a new topology for its quantum processors. Last Friday, the Technical Univer Read more…

The Latest MLPerf Inference Results: Nvidia GPUs Hold Sway but Here Come CPUs and Intel

September 22, 2021

The latest round of MLPerf inference benchmark (v 1.1) results was released today and Nvidia again dominated, sweeping the top spots in the closed (apples-to-ap Read more…

Frontier to Meet 20MW Exascale Power Target Set by DARPA in 2008

July 14, 2021

After more than a decade of planning, the United States’ first exascale computer, Frontier, is set to arrive at Oak Ridge National Laboratory (ORNL) later this year. Crossing this “1,000x” horizon required overcoming four major challenges: power demand, reliability, extreme parallelism and data movement. Read more…

Intel Unveils New Node Names; Sapphire Rapids Is Now an ‘Intel 7’ CPU

July 27, 2021

What's a preeminent chip company to do when its process node technology lags the competition by (roughly) one generation, but outmoded naming conventions make i Read more…

  • arrow
  • Click Here for More Headlines
  • arrow
HPCwire