AHUG at SC20: Arm HPC User Group Kicks off with 25 Presentations, Three Live Panels

By Tiffany Trader

November 5, 2020

The first official Arm HPC User Group (AHUG) proceedings have begun with ~25 presentations now available, and three live (virtual) roundtable panels set to take place next week.

AHUG is hosting the virtual event in partnership with Arm and in tandem with SC20 to promote the work done by Arm users over the past year. Yesterday (Nov. 4), AHUG released the user experience videos on its newly created AHUG YouTube channel. Three live panels will be held Monday, November 9th from 8-11 U.S. PST, featuring a subset of the speakers from these virtual talks. An SVE Hackathon will be held November 10th, run by Arm.

The agenda and schedule are now live on the AHUG website. The videos and round table panels are organized into three tracks: 1) Arm silicon and solution providers, 2) on-site experiences of deploying Arm-based hardware and software, and 3) recent scientific results achieved on Arm.

Registration is free.

Originally set to meet in Porto, Portugual, March 2020, AHUG regrouped from the disruption caused by the COVID-19 pandemic. The group established as a non-profit and elected a board of directors in September. Pending pandemic conditions in the future, AHUG plans to settle into a cadence of annual user meetings in 2021 with plans for regular BOFs also in the mix.

HPCwire recently spoke with newly elected director Jeff Young of Georgia Tech about the formation of AHUG. As a senior research scientist at Georgia Tech, Young’s specialty is the intersection of high performance computing and computer architecture. He is the principal investigator for a testbed, called Rogues Gallery, that hosts all manner of emerging and novel HPC technology (including 3D XPoint, GPUs, FPGAs, Arm SVE processors and neuromorphic architectures) with a focus on designing efficient memory systems. Young was instrumental in establishing one of the first A64FX systems in the U.S. — a 16-node HPE Apollo 80 Arm cluster, called Octavius. (Georgia Tech is one of the few educational organizations in the U.S. that has access to the A64FX processor; the other big one, is Stony Brook University, which has the Ookami system, awarded through a $5M NSF grant.)

Young shared that the new AHUG nonprofit will still get support from Arm but will be independent and user-driven. The operation follows the model set by other user groups, including the Cray User Group (CUG).

A64FX node / HPE Apollo 80 (source: Georgia Tech)

AHUG had its informal start via community collaboration with ARM Research staff. “We want to take that foundation of goodwill and expertise, formalize that into AHUG, and use that to support the growth and the strength of the Arm HPC user base with community events and an annual user meeting,” said Young.

Launching AHUG now makes sense, said Young: “Granted we have the issues with the pandemic, but 2020 is seeing this explosion of Arm and HPC, underscored by the standing up of Fugaku system. Previously we’d seen bits and pieces of Arm and HPC; we saw systems like Astra that were ranked very high in the Top500. But this year, we just see an overwhelming explosion of excitement… Arm for HPC has always been sort of like the year of Linux on the desktop, it’s coming, it’s coming. I think 2020 is when we’ve seen some of the incredible investments that companies and researchers have made paying off in actual hardware and software products. Definitely the hardware is here, the software and the tool stack is all here. Organizations like OpenHPC have made it easy to deploy Arm systems. So we’re seeing Arm HPC at the top end, and hopefully, we will start to see it more dramatically in kind of everyday use cases.”

Young mentions that at Georgia Tech, where they’ve deployed the small A64FX Arm cluster (Octavius), there was some push back initially. “When we were planning this two years back, there were people who questioned who’s going to use the Arm platform when we don’t know the software stack looks like. But, you know, we convinced them that we had this great hardware with the A64FX, and it was going to be available. And we pointed to this investment in tools and software that a lot of vendors like Red Hat and OpenHPC had made. Now we’ve got the system deployed, and I can just see locally, even though we have we have a very small system, people are very excited.”

Jeff Young

Visit the AHUG Youtube playlists to hear more from Jeff Young, as well as Brent Gorda (Arm), Satoshi Matsuoka (RIKEN), Jeff Wittich (Ampere Computing), Simon McIntosh-Smith (University of Bristol), Karl Shultz (OpenHPC), John Stone (University of Illinois), Ross Miller (Oak Ridge National Lab), Si Hammond (Sandia National Lab), Michele Weiland (University of Edinburgh) and many more.

Meet the Board

The AHUG board of directors election was held in summer 2020, resulting in the naming of six board members, who will each serve a term of two years.

In addition to Georgia Tech (U.S.), affiliations span EPCC (Scotland), RIKEN (Japan), LANL (U.S.), GENCI (France) and the University of Neuchâtel (Switzerland). AHUG will benefit from the diverse perspective of Arm end users, said Young.

The board is currently working on official bylaws, and mapping out future events, e.g., BOFs at major community events (SC, ISC, EuroHPC), in addition to the main annual AHUG meetings.

Here are short bios for the new board members:

Jeffrey Young (Managing Director)

Jeff is a senior research scientist in Georgia Tech’s School of Computer Science. With a background in computer architecture, his main research interests have focused on the intersection of high-performance computing and novel accelerators including GPUs, Xeon Phi, FPGAs, and  Arm SVE processors. He is currently working on a collaborative research program for near-memory computing with High Bandwidth Memory (HBM) for processors and GPUs. He is a co-director for Georgia Tech’s Center for High Performance Computing and is also the director of a novel architecture testbed, the CRNCH Rogues Gallery, that aims to simplify and democratize access to novel post-Moore accelerators in the neuromorphic, reversible, and novel networking spaces.

Michèle Weiland (Associate Director)

Dr Michèle Weiland is a Senior Research Fellow at EPCC. She specializes in novel technologies for extreme scale parallel computing, leading EPCC’s technical involvements in the ASiMoV Strategic Prosperity Partnership with Rolls-Royce and the NEXTGenIO project, which focuses on innovations for I/O at the Exascale. She also leads on EPCC’s involvement in the Catalyst UK program, a partnership with HPE and Arm to accelerate to adoption of the Arm ecosystem. She is the EPCC PI on a number of research grants, including the EC Horizon 2020 projects ExaFLOW, HPC-WE and SAGE2, as well as Co-I on the ExCALIBUR project ELEMENT and for the Cirrus2 Tier-2 service. She is a member of the EPSRC Strategic Advisory Team for e-Infrastructure.

Mitsuhisa Sato (Associate Director)

Mitsuhisa Sato is a deputy Director of RIKEN Center for Computational Science since 2018. Since 2010, he has been appointed as team leader of the programming environment research team in the Advanced Institute of Computational Science (AICS), recently renamed to R-CCS, RIKEN. Since 2014, he has worked as a team leader for the architecture development team of the FLAGSHIP 2020 project to develop the Japanese flagship supercomputer “Fugaku”. He is a Professor (Cooperative Graduate School Program) and Professor Emeritus of University of Tsukuba.

Steve Poole (Associate Director)

Steve is a thought leader in HPC, influencing design, architecture, and budget in the US DOE and beyond.  A multi-decade veteran of high-level accomplishments in HPC, Steve has had his hands in many designs at LANL (Road Runner), ORNL, and various other agencies. His reputation is one focused around strong technical knowledge and includes strong results in the Arm space. Currently, Steve is the Chief Architect for Next Generation Platforms at LANL.

Christelle Piechurski (Secretary)

Christelle is Chief HPC project officer for GENCI. She is responsible for supporting French national centers’ procurement and acquisition of computing and storage capabilities for researchers. She also leads the technology watch activity group that evaluates promising solutions for early adoption by users and that assesses new technologies at the applications level. She is engaged at the European level through PRACE-6IP. She has a postgraduate degree in Physics and has been active in the HPC world for 20 years. Her career started in the oil and gas industry before moving to x-SGI (HPE) and Atos (2011) as an HPC principal architect.

Valerio Schiavoni (Treasurer)

Valerio is a Maître-Assistant (Lecturer) of the Complex Systems Group at University of Neuchâtel as well as the coordinator for the Competence Centre in Complex Systems and Big Data and the coordinator of the Inter-University Doctoral Program in Computer Science for CUSO. His research interests include distributed systems, software and hardware security systems from large to small and IoT scale, data management and, more recently, systems for deep learning.

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