SHPCP Talk: What Is Disaggregated Composable Infrastructure and Should You Care?

By John Russell

December 14, 2020

What’s your take on disaggregated composable infrastructure? Do you know what it is? Speaking at the Society of HPC Professional’s annual technology (virtual) meeting last week, Earl Dodd, HPC and HPDA architect at technology services giant World Wide Technology, delivered a strong pitch for DCI as the wave of the future for mainstream HPC.

DCI is another version of software defined everything that takes aim at the datacenter. Dodd argued DCI can slash latency and boost TCO.

“We’ve done a really good job in HPC of trying to scale out. OK, we used to scale up, [but] we don’t scale up anymore. We used to have the big SMPs and the CC-NUMA machines and then we got away from that. Now, I see a lot of 4-processor, 8-processor, 16-processor systems. I see these big systems growing again. So how do you seamlessly [and] dynamically put this whole scale-up capability together with that scale-out capability? I believe only forms of disaggregated composability will allow us to drive that,” said Dodd.

Earl Dodd, World Wide Technology

Leaving aside supercomputers and the hyperscalers – vast creatures in their own rights – Dodd took aim at commercial and more mainstream HPC infrastructure. The culprit stymieing modern HPC performance and adoption, he maintained, is latency which in turn is depressing utilization rates which in turn reduces TCO.

Dodd cited Nvidia CEO Jensen Huang’s recent mantra – “[Jensen says] in the datacenter world, and that includes HPC, all things computing must be disaggregated, composable and accelerated. I totally agree with that. I’m mainly talking about the capability market and specifically, the capability market in the cooperation that’s going on with HPC, big data, AI, ML, and DL [where] we’re seeing very, very low utilization rates.”

That change is afoot in HPC is something no one can deny. Dodd and his colleague Zach Splaingard have written a brief paper (Primer Series: Rack-Scale Composable Infrastructure) and argue in it:

“As more applications introduce support for accelerators (GPUs and FPGAs), which can reduce time to result from weeks to literally minutes, users are clamoring for more of these expensive resources. Yet, industry data shows they are only utilized 15 to 20 percent of the time, stranded behind the traditional data center’s rigid architecture.

“Legacy data center infrastructures were not designed for today’s workflow requirements. The scalable modern data center needs a solution that can integrate compute, storage and other communication I/O into a single-system cluster fabric, scaling resources up and out across the cluster as needed. This solution should free resources from their silos to be shared with other network users who draw from these resource pools through a disaggregated composable infrastructure (DCI), an emerging category of infrastructure designed to maximize IT resource usage and improve business agility.”

Broadly, this is not a new idea. It’s virtualization by another name. New software and getting rid of traditional network bottlenecks are among the key enablers, argued Dodd. The PCIe bus (or something like CXL or Gen-Z), contended Dodd, is an excellent candidate for replacing InfiniBand/Ethernet at many points in today’s datacenter.

“In the old days, I’ve got my nodes – thin nodes, fat nodes, high nodes, half-nodes, whatever you want to call them. I’ve got a computing element on computing system on the left side (slide above), and I got thingies in it. That’s a very technical term, by the way thingies. So, compute, memory, GPUs, FPGAs, smart NICs, etc. The idea is those can be disaggregated, and put into other systems, into other enclosures, other boxes, and treated as dynamically available resource pools,” said Dodd in his SHPCP talk.

“If you look at this chart, I’ve got a server on one side and server on the other side. We’re using something [like this] on the right at the labs now. We’ve been actively testing GigaIO‘s FabreX environment. In the old days, you had to go all the way down to that NIC layer, and you had to get across some form of a network and get back up and talk to something. And that’s even when you had to pool multiple nodes together. Okay, so we create fatter nodes, 4U boxes, and 7U boxes and 9U enclosures, and then put a midplane in there and put these things together. That whole thing is eliminated when I can talk PCIe-to-PCIe,” he said.

Currently, said Dodd, there are many misconceptions around DCI vendor lock-in, performance penalties, and whether DCI will sort of happen on its own.

“A lot of people are very much worried about vendor lock-in. You’ll hear a lot about, “Oh, I have a composable infrastructure,” but then they’ll say, and “I have a midplane, or I have a backplane and thou shalt only have stuff to fit into my mid plane, or backplane.” That creates vendor lock-in. And there is this concept of a tax, as in performance penalty associated with it by going through another midplane, another set of chipsets, another translation that goes on in there and that just adds latency. Latency overall is the big killer. It’s not the bandwidth, it’s the latency, latency, latency.

“[Another misbelief] is that composability is going to happen on its own, it’s going to have the Darwin effect; if we’ve gone from a converged infrastructure to hyperconverged infrastructure, [then] composability will naturally come out of that. It’ll happen on its own. Wrong, that is not going to happen. It has to be actually thought [through], because there is a lot of software needed to help make software-defined datacenter [actually become] software defined. Another misconception is you have to be close: you know, the memory must stick right next to the processor. The GPU must be really close and in the same box as the processor, the FPGA, or the persistent memory. Or you need the smart NIC sitting right next to the box. That is completely wrong. Within reason today I can disaggregate things up to about 30 meters, and still maintain the same performance characteristics. Now, that is a game changer.”

One important issue, said Dodd, was the tendency of the HPC community to think of itself as defined by workloads; today that is anachronistic, he suggested. What matters more, he argued, is workflow because it directly influences latency. Disaggregating resources in the manner described he says will drive down latency and drive up HPC utilization.

There was certainly a product pitch element to Dodd’s presentation and not too much detail. That said, it was fascinating and he was quick to emphasize that the GigaIO technology he was using as an example was based on open standards including Redfish and PCIe. Others will certainly develop their own version of DCI technology. Indeed Liqid’s composable architecture creates a flexible shared resource pool over the PCIe bus.

“This allows you to take almost any of these nodes and make some of the resources available to other node types in the system via the PCIe switch,” said George Moncrief, chief technologist at ERDC’s DoD Supercomputing Resource Center (DSRC), in an interview with HPCwire.

It will be interesting to watch how DCI writ large develops.

Subscribe to HPCwire's Weekly Update!

Be the most informed person in the room! Stay ahead of the tech trends with industy updates delivered to you every week!

Nvidia Rolls Out Certified Server Program Targeting AI Applications

January 26, 2021

Nvidia today launched a certified systems program in which participating vendors can offer Nvidia-certified servers with up to eight A100 GPUs. Separate support contracts directly from Nvidia for the certified systems ar Read more…

By John Russell

XSEDE Supercomputers Square Off Against Ebola

January 26, 2021

COVID-19 may have dominated headlines and occupied much of the world’s scientific computing capacity over the last year, but many researchers continued their work to keep other deadly viruses at bay. One of those, Ebol Read more…

By Oliver Peckham

What’s New in HPC Research: Galaxies, Fugaku, Electron Microscopes & More

January 25, 2021

In this regular feature, HPCwire highlights newly published research in the high-performance computing community and related domains. From parallel programming to exascale to quantum computing, the details are here. Read more…

By Oliver Peckham

Red Hat’s Disruption of CentOS Unleashes Storm of Dissent

January 22, 2021

Five weeks after angering much of the CentOS Linux developer community by unveiling controversial changes to the no-cost CentOS operating system, Red Hat has unveiled alternatives for affected users that give them severa Read more…

By Todd R. Weiss

China Unveils First 7nm Chip: Big Island

January 22, 2021

Shanghai Tianshu Zhaoxin Semiconductor Co. is claiming China’s first 7-nanometer chip, described as a leading-edge, general-purpose cloud computing chip based on a proprietary GPU architecture. Dubbed “Big Island Read more…

By George Leopold

AWS Solution Channel

Fire Dynamics Simulation CFD workflow on AWS

Modeling fires is key for many industries, from the design of new buildings, defining evacuation procedures for trains, planes and ships, and even the spread of wildfires. Read more…

HiPEAC Keynote: In-Memory Computing Steps Closer to Practical Reality

January 21, 2021

Pursuit of in-memory computing has long been an active area with recent progress showing promise. Just how in-memory computing works, how close it is to practical application, and what are some of the key opportunities a Read more…

By John Russell

Nvidia Rolls Out Certified Server Program Targeting AI Applications

January 26, 2021

Nvidia today launched a certified systems program in which participating vendors can offer Nvidia-certified servers with up to eight A100 GPUs. Separate support Read more…

By John Russell

Red Hat’s Disruption of CentOS Unleashes Storm of Dissent

January 22, 2021

Five weeks after angering much of the CentOS Linux developer community by unveiling controversial changes to the no-cost CentOS operating system, Red Hat has un Read more…

By Todd R. Weiss

HiPEAC Keynote: In-Memory Computing Steps Closer to Practical Reality

January 21, 2021

Pursuit of in-memory computing has long been an active area with recent progress showing promise. Just how in-memory computing works, how close it is to practic Read more…

By John Russell

HiPEAC’s Vision for a New Cyber Era, a ‘Continuum of Computing’

January 21, 2021

Earlier this week (Jan. 19), HiPEAC — the European Network on High Performance and Embedded Architecture and Compilation — published the 8th edition of the HiPEAC Vision, detailing an increasingly interconnected computing landscape where complex tasks are carried out across multiple... Read more…

By Tiffany Trader

Saudi Aramco Unveils Dammam 7, Its New Top Ten Supercomputer

January 21, 2021

By revenue, oil and gas giant Saudi Aramco is one of the largest companies in the world, and it has historically employed commensurate amounts of supercomputing Read more…

By Oliver Peckham

President-elect Biden Taps Eric Lander and Deep Team on Science Policy

January 19, 2021

Last Friday U.S. President-elect Joe Biden named The Broad Institute founding director and president Eric Lander as his science advisor and as director of the Office of Science and Technology Policy. Lander, 63, is a mathematician by training and distinguished life sciences... Read more…

By John Russell

Pat Gelsinger Returns to Intel as CEO

January 14, 2021

The Intel board of directors has appointed a new CEO. Intel alum Pat Gelsinger is leaving his post as CEO of VMware to rejoin the company that he parted ways with 11 years ago. Gelsinger will succeed Bob Swan, who will remain CEO until Feb. 15. Gelsinger previously spent 30 years... Read more…

By Tiffany Trader

Julia Update: Adoption Keeps Climbing; Is It a Python Challenger?

January 13, 2021

The rapid adoption of Julia, the open source, high level programing language with roots at MIT, shows no sign of slowing according to data from Julialang.org. I Read more…

By John Russell

Julia Update: Adoption Keeps Climbing; Is It a Python Challenger?

January 13, 2021

The rapid adoption of Julia, the open source, high level programing language with roots at MIT, shows no sign of slowing according to data from Julialang.org. I Read more…

By John Russell

Esperanto Unveils ML Chip with Nearly 1,100 RISC-V Cores

December 8, 2020

At the RISC-V Summit today, Art Swift, CEO of Esperanto Technologies, announced a new, RISC-V based chip aimed at machine learning and containing nearly 1,100 low-power cores based on the open-source RISC-V architecture. Esperanto Technologies, headquartered in... Read more…

By Oliver Peckham

Azure Scaled to Record 86,400 Cores for Molecular Dynamics

November 20, 2020

A new record for HPC scaling on the public cloud has been achieved on Microsoft Azure. Led by Dr. Jer-Ming Chia, the cloud provider partnered with the Beckman I Read more…

By Oliver Peckham

NICS Unleashes ‘Kraken’ Supercomputer

April 4, 2008

A Cray XT4 supercomputer, dubbed Kraken, is scheduled to come online in mid-summer at the National Institute for Computational Sciences (NICS). The soon-to-be petascale system, and the resulting NICS organization, are the result of an NSF Track II award of $65 million to the University of Tennessee and its partners to provide next-generation supercomputing for the nation's science community. Read more…

Is the Nvidia A100 GPU Performance Worth a Hardware Upgrade?

October 16, 2020

Over the last decade, accelerators have seen an increasing rate of adoption in high-performance computing (HPC) platforms, and in the June 2020 Top500 list, eig Read more…

By Hartwig Anzt, Ahmad Abdelfattah and Jack Dongarra

Aurora’s Troubles Move Frontier into Pole Exascale Position

October 1, 2020

Intel’s 7nm node delay has raised questions about the status of the Aurora supercomputer that was scheduled to be stood up at Argonne National Laboratory next year. Aurora was in the running to be the United States’ first exascale supercomputer although it was on a contemporaneous timeline with... Read more…

By Tiffany Trader

10nm, 7nm, 5nm…. Should the Chip Nanometer Metric Be Replaced?

June 1, 2020

The biggest cool factor in server chips is the nanometer. AMD beating Intel to a CPU built on a 7nm process node* – with 5nm and 3nm on the way – has been i Read more…

By Doug Black

Programming the Soon-to-Be World’s Fastest Supercomputer, Frontier

January 5, 2021

What’s it like designing an app for the world’s fastest supercomputer, set to come online in the United States in 2021? The University of Delaware’s Sunita Chandrasekaran is leading an elite international team in just that task. Chandrasekaran, assistant professor of computer and information sciences, recently was named... Read more…

By Tracey Bryant

Leading Solution Providers

Contributors

Top500: Fugaku Keeps Crown, Nvidia’s Selene Climbs to #5

November 16, 2020

With the publication of the 56th Top500 list today from SC20's virtual proceedings, Japan's Fugaku supercomputer – now fully deployed – notches another win, Read more…

By Tiffany Trader

Texas A&M Announces Flagship ‘Grace’ Supercomputer

November 9, 2020

Texas A&M University has announced its next flagship system: Grace. The new supercomputer, named for legendary programming pioneer Grace Hopper, is replacing the Ada system (itself named for mathematician Ada Lovelace) as the primary workhorse for Texas A&M’s High Performance Research Computing (HPRC). Read more…

By Oliver Peckham

At Oak Ridge, ‘End of Life’ Sometimes Isn’t

October 31, 2020

Sometimes, the old dog actually does go live on a farm. HPC systems are often cursed with short lifespans, as they are continually supplanted by the latest and Read more…

By Oliver Peckham

Gordon Bell Special Prize Goes to Massive SARS-CoV-2 Simulations

November 19, 2020

2020 has proven a harrowing year – but it has produced remarkable heroes. To that end, this year, the Association for Computing Machinery (ACM) introduced the Read more…

By Oliver Peckham

Nvidia and EuroHPC Team for Four Supercomputers, Including Massive ‘Leonardo’ System

October 15, 2020

The EuroHPC Joint Undertaking (JU) serves as Europe’s concerted supercomputing play, currently comprising 32 member states and billions of euros in funding. I Read more…

By Oliver Peckham

Intel Xe-HP GPU Deployed for Aurora Exascale Development

November 17, 2020

At SC20, Intel announced that it is making its Xe-HP high performance discrete GPUs available to early access developers. Notably, the new chips have been deplo Read more…

By Tiffany Trader

Nvidia-Arm Deal a Boon for RISC-V?

October 26, 2020

The $40 billion blockbuster acquisition deal that will bring chipmaker Arm into the Nvidia corporate family could provide a boost for the competing RISC-V architecture. As regulators in the U.S., China and the European Union begin scrutinizing the impact of the blockbuster deal on semiconductor industry competition and innovation, the deal has at the very least... Read more…

By George Leopold

HPE, AMD and EuroHPC Partner for Pre-Exascale LUMI Supercomputer

October 21, 2020

Not even a week after Nvidia announced that it would be providing hardware for the first four of the eight planned EuroHPC systems, HPE and AMD are announcing a Read more…

By Oliver Peckham

  • arrow
  • Click Here for More Headlines
  • arrow
Do NOT follow this link or you will be banned from the site!
Share This