There’s no quibbling with Nvidia’s success. Entrenched atop the GPU market, Nvidia has ridden its own inventiveness and growing demand for accelerated computing to meet the needs of HPC and AI. Recently it embarked on an ambitious expansion by acquiring Mellanox (interconnect) and is now working to complete the purchase of Arm (processor IP). Along the way, it jumped into the systems business with its DGX line. What was mostly a GPU company is suddenly quite a bit more.
Bill Dally, chief scientist and senior vice president, research, argues that R&D has been and remains a key player in Nvidia’s current and long-term success. At GTC21 this spring Dally provided a glimpse into Nvidia’s R&D organization and a couple of high priority projects. Like Nvidia writ large, Dally’s research group is expanding. It recently added a “GPU storage systems” effort and just started an “autonomous vehicle research group,” said Dally.
Presented here is a snapshot of the Nvidia R&D organization and a little about its current efforts as told by Dally plus a few of his Q&A responses at the end of the article.
“[We] are loosely organized into a supply side and demand side. The supply side of the research lab tries to develop technology that goes directly to supply our product needs to make better GPUs – [these are] VLSI design methodologies to architect the GPUs, better GPU architectures, better networking technology to connect CPUs together and into the larger datacenter programming systems, and we recently started a new GPU storage systems group,” said Dally.
“The demand side of Nvidia Research aims to drive demand for GPUs. We actually have three different graphics research groups, because one thing we have to continually do is raise the bar for what is good real-time graphics. If it ever becomes good enough, eventually, the integrated graphics that you get for free with certain CPUs will become good enough. And then there’ll be no demand for our discrete GPUs anymore. But by introducing ray tracing, by introducing better illumination both direct and indirect, we’re able to constantly raise the bar on what people demand for good real time graphics.”
Not surprisingly, AI has quickly become a priority. “We have actually five different AI labs because AI has become such a huge driver for demand for GPUs,” he said. A couple years ago the company opened a robotics lab. “We believe that Nvidia GPUs will be the brains of all future robots, and we want to lead that revolution as robots go from being very active positioning machines to being things that interact with their environments and interact with humans. We’ve also just started an autonomous vehicle research group to look at technology that will lead the way for our DRIVE products.”
Occasionally, said Dally, Nvidia will pull people together from the different research for what are called “moonshots” or high-impact projects. “We did one of those that developed the TTU [tree traversal unit], what is now called the RT core, to introduce ray tracing to real-time graphics. We did one for a research GPU that later turned into Volta. [Moonshots] are typically larger projects that try to push technology further ahead, integrating concepts from many of the different disciplines,” said Dally.
A clear focus on productizing R&D has consistently paid off for Nvidia contends Dally, “Over the years, we’ve had a huge influence on Nvidia technology. Almost all of ray tracing at Nvidia started within a Nvidia Research. Starting with the development of optics and the software ray tracer that forms the core of our professional graphics offering. More recently developing the RT cores that have brought ray tracing to real time and consumer graphics. We got Nvidia into networking when we developed NVSwitch originally as a research project back in about 2012. And we got Nvidia into deep learning and AI on a collaborative project with Stanford that led to the development of cuDNN,” he said.
So much for history. Today, like many others, Nvidia is investigating in optical communications technology to overcome speedbumps imposed by existing wire-based technology. Dally discussed some of Nvidia’s current efforts.
“When we started working on NVLink and NVSwitch, it was because we had this vision that we’re not just building one GPU, but we’re building a system that incorporates many GPUs, switches and connections to the larger datacenter. To do this, we need technology that allows our GPUs to communicate with each other and other elements of the system, and this is becoming harder to do for two reasons,” he said.
Slowing switching times and “wiring” constraints” are the main culprits. For example, said Dally, using 26-gauge cable you can go at different bit rates – 25, 50, 100, 200 Gbps – but at 200 Gbps, you’re down to one meter (reach) which is barely enough to reach a top of rack switch from a GPU; if you speed up to 400 Gbps, it’s going to be a half a meter.
“What we want is to get as many bits per second off a millimeter chip edge as we can because if you look forward, we’re going to be building 100 terabit switches, and we need to get 100 terabits per second off of that switch. So we’d like to be at more than a terabit per second per millimeter of chip edge and we’d like to be able to reach at least 10 meters. It turns out if you’re building something like a DGX SuperPod, you actually need very few cables longer than that. And we’d like to have the energy per bit be down in the one picojoule per bit range. The technology that seems most promising to do this is dense wavelength division multiplexing with integrated silicon photonics.”
Conceptually the idea is pretty straightforward.
“This chart (below) shows the general architecture. We start with a laser comb source. This is a laser that produces a number of different colors of light. I say different colors [but they] are imperceptibly different by like 100 gigahertz in frequency, but it produces these different colors of light and sends them over a supply fiber to our transmitter. In the transmitter, we have a number of ring resonators that are able to individually modulate (on-and-off) the different colors of light. So we can take one color of light and modulate it at some bit rate on and off. We do this simultaneously in parallel on all of the other colors and get a bit rate which is a product of the number of colors we have and the bit rate we’re switching per color. We send that over a fiber with a reach of 10-to-100 meters to our receiving integrated circuit. [There] we pick off with ring resonators the different colors that are now either on or off with a bitstream and send that photodetectors and transimpedance amplifiers and on up to the receiver,” described Dally
Dally envisions a future optical DGX where a GPU will communicate via an organic package to an electrical integrated circuit that basically takes that GPU link and modulates the individual ring resonators that you saw in the previous figure on the photonic integrated circuit. The photonic integrated circuit accepts the supply fiber from the laser, has the ring resonator modulators, and drives that fiber to the receiver. The receiver will have an NVSwitch and has the same photonic integrated circuit. But now we’re on the receive side where the ring resonators pick the wavelengths off to the electrical integrated circuit, and it drives the switch.
“The key to this is that optical engine,” he said, “which has a couple of components on it. It has the host electrical interface that receives a short reach electrical interface from the GPU. It has modulator drivers to modulate the ring resonators as well as control circuitry, for example, to maintain the temperature of the ring resonators [which must be at] a very accurate temperature to keep the frequency stable. It then has waveguides to grating couplers that couple that energy into the fiber that goes to the switch.”
Many electronic system and device makers are grappling with the interconnect bandwidth issue. Likely at a future GTC, one of Dally’s colleagues from product management will be showcasing new optical interconnect systems while the Nvidia R&D team is grappling with some new set of projects.
“I hope that the projects I described for you today [will achieve] future success, but we never know. Some of our projects become the next RT core. Some of our projects [don’t work as planned, and] we quietly declare success and move on to the next one. But we are trying to do everything that we think could have impact on Nvidia’s future.”
POST SCRIPTS – Dally Quick Hits During Q&A
Nvidia R&D Reach – Go Where the Talent Is
“We are already geographically very, very diverse. I have a map. Of course, it’s not in the slide deck (shrugs), we’re all over North America and Europe. And a couple years ago, actually, even before the Mellanox acquisition, we opened an office in Tel Aviv. What’s driven this geographic expansion has been talent, we find smart people. And there are a lot of smart people who don’t want to move to Santa Clara, California. So we basically create an office where they are. I think there are certainly some gaps. One gap I see as a big gap is an office in Asia; there are an awful lot of smart people in Asia, a lot of interesting work coming out of there. And I think Africa and South America clearly have talent pools we want to be tapping as well.”
On Fab Technology’s Future
“So what will be the future of computing when the fab processing technology becomes near sub nanometer scaling with respect to quantum computing? That’s a good question, but I don’t know that I’ve given that much thought. I think we’ve got a couple generations to go. Ampere’s in seven nanometers and we see our way clearly to five nanometers and three nanometers, and the devices there operate very classically. Quantum computing, I think if we move there, it’s not going to be, you know, with conventional fabs. It’s going to be with these Josephson junction based technologies that a lot of people are experimenting, or with photonics, or with trapped ions. We have done a study group to look at quantum computing and have seen it as a technology is pretty far out. But our strategy is to enable [quantum] by things like the recently announced cuQuantum (SDK) so that we can both help people simulate quantum algorithms until quantum computers are available, and ultimately run the classical part of those quantum computers on our GPUs.”
Not Betting on Neuromorphic Tech
“The next one is ‘do you see Nvidia developing neuromorphic hardware to support spiking neural networks?’ The short answer is no, I’ve actually spent a lot of time looking at neuromorphic computing. I spent a lot of time looking at a lot of emerging technologies and try to ask the question, ‘Could these technologies make a difference for Nvidia?’ For neuromorphic computing the answer is no, and sort of consists of three things. One of them is the the spiking representation, which is actually a pretty inefficient representation of data because you’re toggling a line up and down multiple times to signal a number. To have that say 256 dynamic range, on average, you’d have to toggle 128 times and that [requires] probably 64 times more energy than an integer representation. Then there’s the analog computation and we’ve looked at analog computation, finding it to be less energy efficient when you consider the need to convert to store the digital computation. And then there’s different models they typically come up with. If those models were better than models, like BERT for language, or Resnet, for imaging, people would be using them, but they don’t win the competitions. So we’re not looking at spiking things right now.”
Can DL Leverage Sparsity – Yes.
“The next question here is ‘can deep learning techniques leverage sparsity, for example, sparse atom optimizer, sparse attention, take advantage of the sparse matrix multiplication mechanisms in the Ampere tensor cores?’ That’s a bit off topic, but the short answer is yes. I mean, neural networks are fundamentally sparse. [A colleague and] I had a paper at NeurIPS in 2015, where we showed that you can basically prune most convolution layers down to 30 percent density and most fully-connected layers down to 10 percent or less density with no loss of accuracy. So I think that getting to the 50 percent you need to exploit the sparse matrix multiply units in Ampere is actually very easy. And I think we’re going to see, actually we’ve already seen that applied kind of across the board on the matrix multiply gives you a 2x improvement. But over the whole application, which includes all these things that aren’t matrix multiply, like the normalization step, and the nonlinear operator and the pooling, we actually even considering all of that and Amdahl’s law – we still get a 1.5x speed up on BERT applying the sparse tensor cores.”