LLVM Holds the Keys to Exascale Computing

By Rob Farber

July 13, 2021

The recent proliferation of new hardware technologies has galvanized the high-performance computing (HPC) community and created the ability to deliver the nation’s forthcoming exascale-capable supercomputers and data centers. It has also made LLVM-based compiler technology the default gatekeeper to these new systems.

LLVM, an open-source collection of compiler and toolchain technologies, serves as a test bed for proposed parallelization extensions (e.g., the interoperability directive in OpenMP 5.1) and as a vehicle to provide production-quality parallel compiler implementations. Johannes Doerfert, a researcher at Argonne National Laboratory, notes that “LLVM is a vehicle to provide performant implementations of OpenMP across all platforms.[1] In LLVM we always aim to be portable, standard compliant, and complete with regards to the standard. Aside from OpenMP, LLVM can also benefit other pragma-based standards and parallel programming models, such as OpenACC, CUDA, SYCL, and HIP.”

Virtually every leading computing company is collaborating on LLVM, which is one of the many benefits of using the LLVM compiler infrastructure. “People don’t realize that most HPC vendor compilers are LLVM-based,” Doerfert observes. “Improvements in collaboration as well as improvements to LLVM benefit both vendor products and the overall HPC community.”

Direct Benefits to HPC

Building production compilers on top of LLVM gives the HPC community the ability to provide extensions and bug fixes. This allows the HPC community to focus on HPC needs for their compilers by using LLVM as a vehicle to build custom tooling for program analysis tools, debuggers, and profilers. LLVM is a significant part of the US Department of Energy’s (DOE’s) Exascale Computing Project (ECP), as illustrated in Figure 1, which shows the key role that LLVM plays in all associated projects.

Figure 1. LLVM plays an important role in the Exascale software ecosystem.

LLVM Gives HPC the Ability to Focus Compilers on HPC Needs

The permissive terms of LLVM licensing mean that the HPC community can safely dedicate significant resources to build and release open source software using the LLVM compiler infrastructure. This includes profilers, parallel compilers, debuggers, Domain-Specific Languages (DSLs), and new programming models. It also means that the HPC community is not required to go through the process of filing a bug with the vendor and waiting for a bug fix. Instead, HPC developers can find and submit fixes to the open-source code base.

Fortran for HPC

The ECP Flang project is one example in which the HPC community can focus on a critical need, namely the development of a parallelizing, GPU-enabled Fortran compiler.

Flang is a Fortran front end that can transfer the job of parallelization and binary generation to the LLVM infrastructure to generate binaries for different HPC architectures. Such a compiler is needed to run Fortran applications on new, power-efficient, many-core, massively parallel hardware platforms that are the foundation of modern HPC systems and data centers. Flang is important because there is not a huge commercial emphasis on Fortran, but there is a huge HPC need for an effective parallelizing and GPU-enabled Fortran compiler. GPUs from several vendors are significant architectural components in the forthcoming exascale systems. Figure 2 shows how Flang’s design relies on LLVM.

Figure 2. Flang’s design relies on LLVM.

Many Parallelization and Cross Platform Benefits

Parallelization is difficult, and performant cross-platform parallelization is even more difficult. LLVM provides the compiler infrastructure to create parallelizing compilers beyond parallelizing C/C++ and Fortran compilers. The LLVM parallelization capabilities mean that DSLs can provide generality and performance across LLVM-supported platforms.

Programmatic Assistance in Generating Sane, Deterministic Binaries

To assist with generating production-ready binaries, LLVM allows compiler writers to use sanitizers. Doerfert notes, “In the C++ world, sanitizers provide sanity checks on memory usage and other manifestations of aberrant behavior. Sanitizers can detect such errors during runtime. The result is more robust codes and thorough quick checks that can help ensure correct results and even be used to detect possible intrusions into the supercomputer center.”

Another benefit is detecting race conditions. A race condition occurs when a parallel result depends on the timing of events. The end result causes an application to exhibit unpredictable (i.e. nondeterministic) behavior during runtime. Finding and fixing bugs caused by race conditions can be extremely difficult. LLVM-based race detection can be very useful.

Informative Profilers

Profiling is also important for creating performant parallel codes, especially when codes run across a variety of hardware platforms. Sameer Shende, Director of the Performance Research Lab of the University of Oregon’s Neuroinformatics Center, observes that “The TAU profiler supports all CPUs and GPUs, as well as multi-node profiling with MPI and high-level performance portable libraries, such as Kokkos. It’s one of the few tools that supports all vendor GPUs. The TAU (Tuning and Analysis Utilizes) profiler easily installs via Spack and is distributed in the Extreme-Scale Scientific Software Stack (E4S). Just install TAU with the target back-end CUDA, ROCm, or L0 for OneAPI.” This makes TAU and the LLVM-based profiling application programing interfaces (APIs) important tools for creating performant, cross-platform HPC applications. Figure 3 outlines the TAU profiling system.

Figure 3. The TAU profiling system. (Source: https://www.alcf.anl.gov/sites/default/files/2020-05/CompWorkshop_TAU_2020.pdf.)

A “Swiss army knife” of profiling, TAU relies on LLVM trace and instrumentation capabilities to generate profile information. Significant amounts of profile information can be collected from LLVM. The TAU team creates meaningful displays to help people find performance issues in parallel distributed codes. Example views generated by the ParaProf analysis tool can be seen in Figure 4. In particular, ParaProf can display profile information about MPI communication calls. A standard in HPC, the MPI library handles the communications that dictate the scaling and performance of many HPC applications. Shende notes that with TAU, “you can see the code regions of interest, where you should study your application performance, and where you should focus your optimization efforts.”

Figure 4. TAU Analysis with example ParaProf views.

Synopsys of What TAU Supports

  • OpenMP
    • OpenMP Tools Interface (OMPT) tools interface to track salient OpenMP runtime events
    • Opari source rewriter
    • Preloading wrapper OpenMP runtime library when OMPT is not supported
  • OpenACC
    • OpenACC instrumentation API
    • Tracks data transfers between host and device (per variable)
    • Tracks time spent in kernels
  • OpenCL
    • OpenCL profiling interface
    • Tracks timings of kernels
  • CUDA
    • CUDA Profiling Tools Interface
    • Tracks data transfers between host and GPU
    • Tracks access to uniform shared memory between host and GPU
  • ROCm
    • Rocprofiler and Roctracer instrumentation interfaces
    • HIP LLVM compiler based instrumentation support
    • Tracks data transfers and kernel execution between host and GPU
  • Intel oneAPI
    • Intel compilers with compiler-based instrumentation and Level Zero profiling API
    • OpenCL profiling API

Summary

The liberal licensing and strong vendor support make LLVM an excellent vehicle for the HPC community to use in addressing many HPC community needs. This is reflected in the belief by Doug Kothe, Director of DOE’s ECP, that “LLVM compiler technology is becoming the nexus for vendor and community compiler development and evolution.”[2]

Rob Farber is a global technology consultant and author with an extensive background in HPC and in developing machine learning technology that he applies at national laboratories and commercial organizations.

[1] https://www.exascaleproject.org/highlight/sollve-openmp-for-hpc-and-exascale/

[2] https://www.exascaleproject.org/highlight/sollve-openmp-for-hpc-and-exascale/

Subscribe to HPCwire's Weekly Update!

Be the most informed person in the room! Stay ahead of the tech trends with industy updates delivered to you every week!

Why HPC Storage Matters More Now Than Ever: Analyst Q&A

September 17, 2021

With soaring data volumes and insatiable computing driving nearly every facet of economic, social and scientific progress, data storage is seizing the spotlight. Hyperion Research analyst and noted storage expert Mark No Read more…

GigaIO Gets $14.7M in Series B Funding to Expand Its Composable Fabric Technology to Customers

September 16, 2021

Just before the COVID-19 pandemic began in March 2020, GigaIO introduced its Universal Composable Fabric technology, which allows enterprises to bring together any HPC and AI resources and integrate them with networking, Read more…

What’s New in HPC Research: Solar Power, ExaWorks, Optane & More

September 16, 2021

In this regular feature, HPCwire highlights newly published research in the high-performance computing community and related domains. From parallel programming to exascale to quantum computing, the details are here. Read more…

Cerebras Brings Its Wafer-Scale Engine AI System to the Cloud

September 16, 2021

Five months ago, when Cerebras Systems debuted its second-generation wafer-scale silicon system (CS-2), co-founder and CEO Andrew Feldman hinted of the company’s coming cloud plans, and now those plans have come to fruition. Today, Cerebras and Cirrascale Cloud Services are launching... Read more…

AI Hardware Summit: Panel on Memory Looks Forward

September 15, 2021

What will system memory look like in five years? Good question. While Monday's panel, Designing AI Super-Chips at the Speed of Memory, at the AI Hardware Summit, tackled several topics, the panelists also took a brief glimpse into the future. Unlike compute, storage and networking, which... Read more…

AWS Solution Channel

Supporting Climate Model Simulations to Accelerate Climate Science

The Amazon Sustainability Data Initiative (ASDI), AWS is donating cloud resources, technical support, and access to scalable infrastructure and fast networking providing high performance computing (HPC) solutions to support simulations of near-term climate using the National Center for Atmospheric Research (NCAR) Community Earth System Model Version 2 (CESM2) and its Whole Atmosphere Community Climate Model (WACCM). Read more…

ECMWF Opens Bologna Datacenter in Preparation for Atos Supercomputer

September 14, 2021

In January 2020, the European Centre for Medium-Range Weather Forecasts (ECMWF) – a juggernaut in the weather forecasting scene – signed a four-year, $89-million contract with European tech firm Atos to quintuple its supercomputing capacity. With the deal approaching the two-year mark, ECMWF... Read more…

GigaIO Gets $14.7M in Series B Funding to Expand Its Composable Fabric Technology to Customers

September 16, 2021

Just before the COVID-19 pandemic began in March 2020, GigaIO introduced its Universal Composable Fabric technology, which allows enterprises to bring together Read more…

Cerebras Brings Its Wafer-Scale Engine AI System to the Cloud

September 16, 2021

Five months ago, when Cerebras Systems debuted its second-generation wafer-scale silicon system (CS-2), co-founder and CEO Andrew Feldman hinted of the company’s coming cloud plans, and now those plans have come to fruition. Today, Cerebras and Cirrascale Cloud Services are launching... Read more…

AI Hardware Summit: Panel on Memory Looks Forward

September 15, 2021

What will system memory look like in five years? Good question. While Monday's panel, Designing AI Super-Chips at the Speed of Memory, at the AI Hardware Summit, tackled several topics, the panelists also took a brief glimpse into the future. Unlike compute, storage and networking, which... Read more…

ECMWF Opens Bologna Datacenter in Preparation for Atos Supercomputer

September 14, 2021

In January 2020, the European Centre for Medium-Range Weather Forecasts (ECMWF) – a juggernaut in the weather forecasting scene – signed a four-year, $89-million contract with European tech firm Atos to quintuple its supercomputing capacity. With the deal approaching the two-year mark, ECMWF... Read more…

Quantum Computer Market Headed to $830M in 2024

September 13, 2021

What is one to make of the quantum computing market? Energized (lots of funding) but still chaotic and advancing in unpredictable ways (e.g. competing qubit tec Read more…

Amazon, NCAR, SilverLining Team for Unprecedented Cloud Climate Simulations

September 10, 2021

Earth’s climate is, to put it mildly, not in a good place. In the wake of a damning report from the Intergovernmental Panel on Climate Change (IPCC), scientis Read more…

After Roadblocks and Renewals, EuroHPC Targets a Bigger, Quantum Future

September 9, 2021

The EuroHPC Joint Undertaking (JU) was formalized in 2018, beginning a new era of European supercomputing that began to bear fruit this year with the launch of several of the first EuroHPC systems. The undertaking, however, has not been without its speed bumps, and the Union faces an uphill... Read more…

How Argonne Is Preparing for Exascale in 2022

September 8, 2021

Additional details came to light on Argonne National Laboratory’s preparation for the 2022 Aurora exascale-class supercomputer, during the HPC User Forum, held virtually this week on account of pandemic. Exascale Computing Project director Doug Kothe reviewed some of the 'early exascale hardware' at Argonne, Oak Ridge and NERSC (Perlmutter), while Ti Leggett, Deputy Project Director & Deputy Director... Read more…

Ahead of ‘Dojo,’ Tesla Reveals Its Massive Precursor Supercomputer

June 22, 2021

In spring 2019, Tesla made cryptic reference to a project called Dojo, a “super-powerful training computer” for video data processing. Then, in summer 2020, Tesla CEO Elon Musk tweeted: “Tesla is developing a [neural network] training computer called Dojo to process truly vast amounts of video data. It’s a beast! … A truly useful exaflop at de facto FP32.” Read more…

Berkeley Lab Debuts Perlmutter, World’s Fastest AI Supercomputer

May 27, 2021

A ribbon-cutting ceremony held virtually at Berkeley Lab's National Energy Research Scientific Computing Center (NERSC) today marked the official launch of Perlmutter – aka NERSC-9 – the GPU-accelerated supercomputer built by HPE in partnership with Nvidia and AMD. Read more…

Esperanto, Silicon in Hand, Champions the Efficiency of Its 1,092-Core RISC-V Chip

August 27, 2021

Esperanto Technologies made waves last December when it announced ET-SoC-1, a new RISC-V-based chip aimed at machine learning that packed nearly 1,100 cores onto a package small enough to fit six times over on a single PCIe card. Now, Esperanto is back, silicon in-hand and taking aim... Read more…

Enter Dojo: Tesla Reveals Design for Modular Supercomputer & D1 Chip

August 20, 2021

Two months ago, Tesla revealed a massive GPU cluster that it said was “roughly the number five supercomputer in the world,” and which was just a precursor to Tesla’s real supercomputing moonshot: the long-rumored, little-detailed Dojo system. “We’ve been scaling our neural network training compute dramatically over the last few years,” said Milan Kovac, Tesla’s director of autopilot engineering. Read more…

CentOS Replacement Rocky Linux Is Now in GA and Under Independent Control

June 21, 2021

The Rocky Enterprise Software Foundation (RESF) is announcing the general availability of Rocky Linux, release 8.4, designed as a drop-in replacement for the soon-to-be discontinued CentOS. The GA release is launching six-and-a-half months after Red Hat deprecated its support for the widely popular, free CentOS server operating system. The Rocky Linux development effort... Read more…

Intel Completes LLVM Adoption; Will End Updates to Classic C/C++ Compilers in Future

August 10, 2021

Intel reported in a blog this week that its adoption of the open source LLVM architecture for Intel’s C/C++ compiler is complete. The transition is part of In Read more…

Google Launches TPU v4 AI Chips

May 20, 2021

Google CEO Sundar Pichai spoke for only one minute and 42 seconds about the company’s latest TPU v4 Tensor Processing Units during his keynote at the Google I Read more…

AMD-Xilinx Deal Gains UK, EU Approvals — China’s Decision Still Pending

July 1, 2021

AMD’s planned acquisition of FPGA maker Xilinx is now in the hands of Chinese regulators after needed antitrust approvals for the $35 billion deal were receiv Read more…

Leading Solution Providers

Contributors

Hot Chips: Here Come the DPUs and IPUs from Arm, Nvidia and Intel

August 25, 2021

The emergence of data processing units (DPU) and infrastructure processing units (IPU) as potentially important pieces in cloud and datacenter architectures was Read more…

10nm, 7nm, 5nm…. Should the Chip Nanometer Metric Be Replaced?

June 1, 2020

The biggest cool factor in server chips is the nanometer. AMD beating Intel to a CPU built on a 7nm process node* – with 5nm and 3nm on the way – has been i Read more…

HPE Wins $2B GreenLake HPC-as-a-Service Deal with NSA

September 1, 2021

In the heated, oft-contentious, government IT space, HPE has won a massive $2 billion contract to provide HPC and AI services to the United States’ National Security Agency (NSA). Following on the heels of the now-canceled $10 billion JEDI contract (reissued as JWCC) and a $10 billion... Read more…

Julia Update: Adoption Keeps Climbing; Is It a Python Challenger?

January 13, 2021

The rapid adoption of Julia, the open source, high level programing language with roots at MIT, shows no sign of slowing according to data from Julialang.org. I Read more…

Quantum Roundup: IBM, Rigetti, Phasecraft, Oxford QC, China, and More

July 13, 2021

IBM yesterday announced a proof for a quantum ML algorithm. A week ago, it unveiled a new topology for its quantum processors. Last Friday, the Technical Univer Read more…

Intel Launches 10nm ‘Ice Lake’ Datacenter CPU with Up to 40 Cores

April 6, 2021

The wait is over. Today Intel officially launched its 10nm datacenter CPU, the third-generation Intel Xeon Scalable processor, codenamed Ice Lake. With up to 40 Read more…

Frontier to Meet 20MW Exascale Power Target Set by DARPA in 2008

July 14, 2021

After more than a decade of planning, the United States’ first exascale computer, Frontier, is set to arrive at Oak Ridge National Laboratory (ORNL) later this year. Crossing this “1,000x” horizon required overcoming four major challenges: power demand, reliability, extreme parallelism and data movement. Read more…

Intel Unveils New Node Names; Sapphire Rapids Is Now an ‘Intel 7’ CPU

July 27, 2021

What's a preeminent chip company to do when its process node technology lags the competition by (roughly) one generation, but outmoded naming conventions make it seem like it's two nodes behind? For Intel, the response was to change how it refers to its nodes with the aim of better reflecting its positioning within the leadership semiconductor manufacturing space. Intel revealed its new node nomenclature, and... Read more…

  • arrow
  • Click Here for More Headlines
  • arrow
HPCwire