Accelerating the Development of Next-Generation HPC/AI System Architectures with UCIe-Compliant Optical I/O

May 9, 2022

As the HPC/AI community explores new system architectures to support the growing demands of the exascale era and beyond, optical I/O (or OIO) is increasingly being recognized as an imperative to change the performance and power trajectories of system designs. Optical I/O enables compute, memory, and networking ASICs to communicate with dramatically increased bandwidth, at a lower latency, over longer distances, and at a fraction of the power of existing electrical I/O solutions. The technology is also foundational to enabling emerging heterogeneous compute systems, disaggregated/pooled architectures, and unified memory designs critical to accelerating future datacenter innovation.

The introduction of the UCIe standard, the first specification to include an interface built from the ground up to be compatible with optical links, is a critical step in creating an ecosystem to accelerate the development of the next-generation HPC and AI system architectures needed for exascale and beyond.

The Move to Disaggregated System Designs

Large compute systems typically use an architecture where compute and memory resources are tightly coupled to maximize performance. Components such as CPUs, GPUs, and memory must be placed closely together when connected electrically via copper interconnects. This hardware density results in cooling and energy issues, while persistent bandwidth bottlenecks limit inter-processor and memory performance. These issues are exacerbated in compute-intensive applications like HPC, AI, and compute-intensive data analytics.

Today, new disaggregated system architectures with optical interconnect are being investigated to decouple a server’s elements — processors, memory, accelerators, and storage — enabling flexible and dynamic resource allocation, or composability, to meet the needs of each particular workload.

“Disaggregated architectures require communication between memory and processors over longer distances. Pooled resources mean memory, GPUs, and CPUs are each on their own shelves for flexibility in mapping specific resources to specific workloads. Optical interconnects allow off-chip signals to traverse long distances,” explained Nhat Nguyen, Ayar Labs’ senior director of solutions architecture.

Introducing UCIe—a Solution for Chiplet Inter-Connectivity

Universal Chiplet Interconnect Express (UCIe) is a new die-to-die interconnect standard for high-bandwidth, low-latency, power-efficient, and cost-effective connectivity between chiplets. UCIe was developed because chip designs are running up against the die reticle limit.

Intel Corporation originated UCIe 1.0, and ten members ratified the specification, including AMD, Arm, ASE Group, Google Cloud, Intel, Meta, Microsoft, Qualcomm, Samsung, and TSMC. Current standards that compete with UCIe include OpenHBI, Bunch of Wires (BoW), and OIF XSR.

Figure 1 – Source: UCIe Consortium

UCIe provides several benefits over other standards, including:

  • The ability to package dies from different sources, including different fabs, designs, and processing and packaging technologies that can interoperate seamlessly in a single system on chip (SoC)
  • A clear scaling roadmap to address the need for higher bandwidth and shoreline density
  • An interface that is built from the ground up to be compatible with optical links
  • UCIe maps PCIe and Computer Express Link (CXL) protocols natively at the board level across all segments of compute

According to Uday Poosarla, head of product at Ayar Labs, “UCIe has significant advantages over other standards, including scalability, interoperability, and flexibility. UCIe is the first standard to incorporate optics into chip-to-chip interconnects. The CW-WDM MSA, another new standard, provides a great framework for the optical connections, complementing the UCIe standard.”

Figure 2 – Source: UCIe Consortium

 Enabling Optical Interconnects Using the New UCIe Standard

Ayar Labs is focused on bringing optical I/O into the datacenter to remove the “last mile” of copper interconnect and solve the bandwidth density and scaling problem. Ayar Labs was the first to introduce an optical chiplet using Advanced Interface Bus (AIB) as the interface. UCIe is an evolution of the AIB interface, so Ayar Labs’ current AIB-based optical chiplet is compatible with UCIe standards. The Ayar Labs solution includes the TeraPHY™ in-package OIO chiplet and SuperNova™ laser light source, which can be incorporated into a UCIe-compliant chip package. Each TeraPHY chiplet delivers up to two terabits per second of I/O performance, or the equivalent of 64 PCIe Gen5 lanes.

In addition to being a contributing member of the UCIe, Ayar Labs is also a founding member of the CW-WDM MSA, a consortium dedicated to defining and promoting specifications for multi-wavelength advanced integrated optics. This MSA specification compliments UCIe and may help foster cohesion around light sources for integrated optics in the chiplet ecosystem.

Summary

Dramatically increased bandwidth and lower latency in chip-to-chip connectivity will be critical to enabling future HPC and AI systems. Electrical connectivity is delivering diminishing returns as we reach the physical limitations of copper and electrical signaling, ushering in a new era of optical connectivity. The new UCIe standard will allow customizable SoC packages that include optical links. Ayar Labs’ TeraPHY optical I/O chiplet, using an Advanced Interface Bus (AIB) interface, is the first optical interconnect to be “UCIe compatible” and poised to deliver on the promise of disaggregated system architectures for the post-exascale era.

“Most of the parallel interface efforts are marginally different on performance. The key risk is fragmentation of the ecosystem. UCIe solves this by standardizing key elements and enabling a chiplet marketplace. Chiplet providers will benefit from an ecosystem rather than be forced to design many different SKUs for different host SoCs, which is obviously expensive. An analogy might clarify where UCIe fits with other standards: PCIe is to the motherboard as UCIe is to the socket,” summarized Mark Wade, Ayar Labs’ senior vice president of engineering, chief technology officer, and co-founder.

Learn more about Ayar Labs and our UCIe-compatible optical I/O solution.

Subscribe to HPCwire's Weekly Update!

Be the most informed person in the room! Stay ahead of the tech trends with industry updates delivered to you every week!

ISC 2024 Takeaways: Love for Top500, Extending HPC Systems, and Media Bashing

May 23, 2024

The ISC High Performance show is typically about time-to-science, but breakout sessions also focused on Europe's tech sovereignty, server infrastructure, storage, throughput, and new computing technologies. This round Read more…

HPC Pioneer Gordon Bell Passed Away

May 22, 2024

Legendary computer scientist Gordon Bell passed away last Friday at his home in Coronado, CA. He was 89. The New York Times has a nice tribute piece. A long-time pioneer with Digital Equipment Corp, he pushed hard for de Read more…

ISC 2024 — A Few Quantum Gems and Slides from a Packed QC Agenda

May 22, 2024

If you were looking for quantum computing content, ISC 2024 was a good place to be last week — there were around 20 quantum computing related sessions. QC even earned a slide in Kathy Yelick’s opening keynote — Bey Read more…

Atos Outlines Plans to Get Acquired, and a Path Forward

May 21, 2024

Atos – via its subsidiary Eviden – is the second major supercomputer maker outside of HPE, while others have largely dropped out. The lack of integrators and Atos' financial turmoil have the HPC market worried. If Atos goes under, HPE will be the only major option for building large-scale systems. Read more…

Core42 Is Building Its 172 Million-core AI Supercomputer in Texas

May 20, 2024

UAE-based Core42 is building an AI supercomputer with 172 million cores which will become operational later this year. The system, Condor Galaxy 3, was announced earlier this year and will have 192 nodes with Cerebras Read more…

Google Announces Sixth-generation AI Chip, a TPU Called Trillium

May 17, 2024

On Tuesday May 14th, Google announced its sixth-generation TPU (tensor processing unit) called Trillium.  The chip, essentially a TPU v6, is the company's latest weapon in the AI battle with GPU maker Nvidia and clou Read more…

ISC 2024 Takeaways: Love for Top500, Extending HPC Systems, and Media Bashing

May 23, 2024

The ISC High Performance show is typically about time-to-science, but breakout sessions also focused on Europe's tech sovereignty, server infrastructure, storag Read more…

ISC 2024 — A Few Quantum Gems and Slides from a Packed QC Agenda

May 22, 2024

If you were looking for quantum computing content, ISC 2024 was a good place to be last week — there were around 20 quantum computing related sessions. QC eve Read more…

Atos Outlines Plans to Get Acquired, and a Path Forward

May 21, 2024

Atos – via its subsidiary Eviden – is the second major supercomputer maker outside of HPE, while others have largely dropped out. The lack of integrators and Atos' financial turmoil have the HPC market worried. If Atos goes under, HPE will be the only major option for building large-scale systems. Read more…

Google Announces Sixth-generation AI Chip, a TPU Called Trillium

May 17, 2024

On Tuesday May 14th, Google announced its sixth-generation TPU (tensor processing unit) called Trillium.  The chip, essentially a TPU v6, is the company's l Read more…

Europe’s Race towards Quantum-HPC Integration and Quantum Advantage

May 16, 2024

What an interesting panel, Quantum Advantage — Where are We and What is Needed? While the panelists looked slightly weary — their’s was, after all, one of Read more…

The Future of AI in Science

May 15, 2024

AI is one of the most transformative and valuable scientific tools ever developed. By harnessing vast amounts of data and computational power, AI systems can un Read more…

Some Reasons Why Aurora Didn’t Take First Place in the Top500 List

May 15, 2024

The makers of the Aurora supercomputer, which is housed at the Argonne National Laboratory, gave some reasons why the system didn't make the top spot on the Top Read more…

ISC 2024 Keynote: High-precision Computing Will Be a Foundation for AI Models

May 15, 2024

Some scientific computing applications cannot sacrifice accuracy and will always require high-precision computing. Therefore, conventional high-performance c Read more…

Synopsys Eats Ansys: Does HPC Get Indigestion?

February 8, 2024

Recently, it was announced that Synopsys is buying HPC tool developer Ansys. Started in Pittsburgh, Pa., in 1970 as Swanson Analysis Systems, Inc. (SASI) by John Swanson (and eventually renamed), Ansys serves the CAE (Computer Aided Engineering)/multiphysics engineering simulation market. Read more…

Nvidia H100: Are 550,000 GPUs Enough for This Year?

August 17, 2023

The GPU Squeeze continues to place a premium on Nvidia H100 GPUs. In a recent Financial Times article, Nvidia reports that it expects to ship 550,000 of its lat Read more…

Comparing NVIDIA A100 and NVIDIA L40S: Which GPU is Ideal for AI and Graphics-Intensive Workloads?

October 30, 2023

With long lead times for the NVIDIA H100 and A100 GPUs, many organizations are looking at the new NVIDIA L40S GPU, which it’s a new GPU optimized for AI and g Read more…

Atos Outlines Plans to Get Acquired, and a Path Forward

May 21, 2024

Atos – via its subsidiary Eviden – is the second major supercomputer maker outside of HPE, while others have largely dropped out. The lack of integrators and Atos' financial turmoil have the HPC market worried. If Atos goes under, HPE will be the only major option for building large-scale systems. Read more…

Choosing the Right GPU for LLM Inference and Training

December 11, 2023

Accelerating the training and inference processes of deep learning models is crucial for unleashing their true potential and NVIDIA GPUs have emerged as a game- Read more…

Nvidia’s New Blackwell GPU Can Train AI Models with Trillions of Parameters

March 18, 2024

Nvidia's latest and fastest GPU, codenamed Blackwell, is here and will underpin the company's AI plans this year. The chip offers performance improvements from Read more…

AMD MI3000A

How AMD May Get Across the CUDA Moat

October 5, 2023

When discussing GenAI, the term "GPU" almost always enters the conversation and the topic often moves toward performance and access. Interestingly, the word "GPU" is assumed to mean "Nvidia" products. (As an aside, the popular Nvidia hardware used in GenAI are not technically... Read more…

Some Reasons Why Aurora Didn’t Take First Place in the Top500 List

May 15, 2024

The makers of the Aurora supercomputer, which is housed at the Argonne National Laboratory, gave some reasons why the system didn't make the top spot on the Top Read more…

Leading Solution Providers

Contributors

Eyes on the Quantum Prize – D-Wave Says its Time is Now

January 30, 2024

Early quantum computing pioneer D-Wave again asserted – that at least for D-Wave – the commercial quantum era has begun. Speaking at its first in-person Ana Read more…

The GenAI Datacenter Squeeze Is Here

February 1, 2024

The immediate effect of the GenAI GPU Squeeze was to reduce availability, either direct purchase or cloud access, increase cost, and push demand through the roof. A secondary issue has been developing over the last several years. Even though your organization secured several racks... Read more…

The NASA Black Hole Plunge

May 7, 2024

We have all thought about it. No one has done it, but now, thanks to HPC, we see what it looks like. Hold on to your feet because NASA has released videos of wh Read more…

Shutterstock 1285747942

AMD’s Horsepower-packed MI300X GPU Beats Nvidia’s Upcoming H200

December 7, 2023

AMD and Nvidia are locked in an AI performance battle – much like the gaming GPU performance clash the companies have waged for decades. AMD has claimed it Read more…

Intel Plans Falcon Shores 2 GPU Supercomputing Chip for 2026  

August 8, 2023

Intel is planning to onboard a new version of the Falcon Shores chip in 2026, which is code-named Falcon Shores 2. The new product was announced by CEO Pat Gel Read more…

GenAI Having Major Impact on Data Culture, Survey Says

February 21, 2024

While 2023 was the year of GenAI, the adoption rates for GenAI did not match expectations. Most organizations are continuing to invest in GenAI but are yet to Read more…

How the Chip Industry is Helping a Battery Company

May 8, 2024

Chip companies, once seen as engineering pure plays, are now at the center of geopolitical intrigue. Chip manufacturing firms, especially TSMC and Intel, have b Read more…

Q&A with Nvidia’s Chief of DGX Systems on the DGX-GB200 Rack-scale System

March 27, 2024

Pictures of Nvidia's new flagship mega-server, the DGX GB200, on the GTC show floor got favorable reactions on social media for the sheer amount of computing po Read more…

  • arrow
  • Click Here for More Headlines
  • arrow
HPCwire