The Universal Chiplet Interconnect Express (UCIe) consortium is moving ahead with its effort to standardize a universal interconnect at the package level. The consortium has incorporated under the direction of 12 board members and has launched six working groups. Newly elected members Nvidia and Alibaba have joined the ten founding promoter companies, which include AMD, Arm, Advanced Semiconductor Engineering, Inc. (ASE), Google Cloud, Intel, Meta (Facebook’s parent company), Microsoft, Qualcomm, Samsung and TSMC. 

The group comprises semiconductor and packaging companies, IP suppliers, foundries, and cloud service providers. Three of the biggest cloud companies – Google Cloud, Microsoft and Alibaba Group – are represented, but Amazon, which makes custom Arm-based chips under the Graviton moniker, is not a member. 

Another 40 or so contributor members – among them Ayar Labs, Broadcom, Cadence, Micron and Tachyum – will contribute to future UCIe standards through their participation in the working groups. 

Earlier this year, Intel Corporation donated the UCIe 1.0 spec, which was ratified by the original 10 promoter members.

In a pre-briefing with HPCwire, UCIe Consortium Chair (and Senior Intel Fellow) Debendra Das Sharma referenced a passage from Gordon Moore’s famous 1965 paper: “It may prove to be more economical to build large systems out of smaller functions, which are separately packaged and interconnected,” wrote Moore under the sub-heading “Day of reckoning.” UCIe’s backers believe that, at least in some use cases, that day has arrived.

The UCIe standard will enable chip designers to mix and match dies and other chiplet components from multiple sources with different packaging options. The UCIe 1.0 specification defines a standardized die-to-die interconnect, encompassing a physical layer, protocol stack, software model, and compliance testing. It natively maps PCI Express (PCIe) and Compute Express Link (CXL) protocols. 

The consortium has established six working groups. The five technical working groups span electrical, protocol, form factor/compliance, manageability/security, and systems and software. There is also a marketing working group. It’s akin to how the CXL consortium is organized, said Das Sharma, who is also a co-founder and co-chair of that effort.

Nvidia announced that it would join the UCIe standards group back in March. During the spring GTC proceedings, Nvidia CEO Jensen Huang told HPCwire that as soon as the UCIe spec is stabilized, Nvidia would add it to its chips “as fast as we can.” 

While Nvidia uses its proprietary NVLink chip-to-chip interconnect in its HGX/DGX platforms and its Grace Superchips, it will also leverage the UCIe standard for its semi-custom program. UCIe lets customers build semi-custom chips that connect into Nvidia’s chips (CPUs, GPUs and DPUs) with “just a little engineering effort” in a cost-effective way, Huang said.

There are three levels of UCIe membership: promoters, contributors and adopters. The promoters comprise the board of directors and have leadership roles. Contributor and promoter companies can participate in the working groups, while adopters only get to see the final spec and also get IP protection. That is consistent with how the CXL consortium operates as well, said Das Sharma.

The current board roster is locked in for four years as a stability measure, according to Das Sharma, but the consortium is open to new contributor and adopter level members. 

Contributor members pay dues of $10,000 per year, while adopters (who do not get to participate in the working groups, but do get spec access and IP protections) can join for $2,500 per year. The first year of membership also includes a one-time startup fee equal to the yearly amount, which brings the first-year buy-in to $20,000 for contributors, $5,000 for adopters.

Das Sharma said he sees positive early indicators for UCIe with some parallels to CXL, the interconnect standards consortium that has been steadily making headway since launching in 2019. “I expect it to be at par, if not better than that,” Das Sharma said “This is my honest belief and why I have dedicated so much time to this.”

The UCIe 1.0 Specification is available at https://www.uciexpress.org/specification.

Also see: CXL Consortium Releases Compute Express Link 3.0 Specification