The ability to spin up custom chip designs at a lower cost has made the RISC-V architecture attractive for devices that don’t require cutting edge chips.
Ventana Micro Systems is now bringing that ability to RISC-V chips for servers, with plans to release chips for high-performance computers in the future. Ventana said it plans to cut the time and cost required to design server chips, which typically have multi-year design, validation and testing cycles.
The company announced its Veyron V1 chip, which the company said provides comparable performance to chips based on x86 and Arm architecture. Chips from Intel and AMD are based on the x86 architecture, and major cloud providers are providing cloud instances running on Arm-based chips from Ampere Computing.
With Veyron, companies will not have to wait three to four years to get a final chip, said Travis Lanier, vice president at Ventana.
“In about a year you can say,’I know I need this type of acceleration, I need this type of DRAM, this type of IO and can quickly stitch together these things to create a lower cost solution,” Lanier said.
The introduction of Veyron comes as chip design undergoes fundamental changes. Advanced chips are becoming more challenging to produce, and semiconductor companies are instead turning to chiplets, which involves pairing CPUs, accelerators like GPUs, and other circuits in a single chip package
RISC-V, which is an open instruction set architecture that is licensed free of charge, has the right attributes for chiplets. The base RISC-V ISA has under 100 instructions, and companies can customize and attach their own modules on top of it. Companies have developed their own CPUs, GPUs, AI accelerators, security modules and other cores on top of the RISC-V ISA.
The Veyron chip provide competitive performance to x86 and Arm processors, Lanier said.
The chip has up to 16 cores, and can be paired with up to 12 other chips in a cluster to total 192 cores. Each core runs at up to 3.6GHz, and the chip will be manufactured on TSMC’s 5nm process. The chip has 48MB of shared L3 cache, and supports the CXL 2.0 interconnect.
The company already has customers for the chip, and early deployments are expected next year. Ventana is offering reference desktop and rack development systems with a Veyron CPU, PCIe Gen5 slots, 128GB DDR5 memory and eight NVMe SSDs.
The next version of the Veyron chip will have 32 cores, and be able to scale up easily into larger high-performance computing clusters.
The chip is targeted at infrastructure providers like cloud companies, which have their own software stacks. Lanier said datacenter designs are changing to add acceleration while keeping sustainability and energy efficiency in mind. The modularity of RISC-V helps infrastructure providers be more granular when building out datacenters.
“You are going to have to do domain specific acceleration or use various accelerators to handle this growing computation that’s needed in these datacenters. You are not going to be able to do that with generic CPUs,” Lanier said.
In conversations, Ventana found that hyperscalers are also putting lot of weight on whether they will be able to port their software to the RISC-V architecture, Lanier said.
The RISC-V chip supports various flavors of Linux and popular apps that include MySQL and Apache web serving software.
Ventana is selling Veyron as a standard product with a standard reference I/O hub, and as a chiplet design which customers can top with their own I/O hub. Customers will be able to customize the number of cores on the chip. The chip design can also be licensed from Ventana.
While Ventana may be high on the future of RISC-V in the datacenter, others have said the architecture is many years from wide commercial adoption. The datacenter is dominated by x86, and Arm server chips have just started breaking through after a decade of trying. Concerns about software compatibility kept Arm out of datacenters, and RISC-V faces the same challenge.
Ventana has also partnered with Intel on the design and manufacturing of RISC-V chips. Intel has said it plans to manufacture high-performance chips with a RISC-V chiplet as the main CPU, but that it was still many years away.
“We’ll see. It’s a long process to code porting, performance, all those things, but we think there is a potential future,” Jeff McVeigh, vice president and general manager of the Super Compute Group at Intel told HPCwire last month.