Semiconductor Companies Create Building Block for Chiplet Design

By Agam Shah

January 24, 2023

Intel’s CEO Pat Gelsinger last week made a grand proclamation that chips will be for the next few decades what oil and gas was to the world over the last 50 years.

While that remains to be seen, two technology associations are joining hands to develop building blocks to stabilize the development of future chip designs. The goal of the standard is to set the stage for a thriving marketplace that fuels growth.

The Open Compute Project and JEDEC – two major industry consortiums boasting top tech companies as members – are setting up a standard to support the development of technology that will underpin the manufacturing of chips for computers, cars, factories, medical devices and other equipment.

The conventional way of manufacturing chips, which relied on cramming as much computing and graphics capabilities into smaller chips, has reached physical limitations. These chips are becoming harder to manufacture, which has slowed down advances in chip technology.

Major chipmakers are now taking a new approach with chiplets, which are modules that can be pieced together to construct a chip. Chiplets are like Lego blocks – a customer can mix and match chiplets of their own to build a custom chip.

For example, if a customer wants to build a chip for artificial intelligence, they can piece together chiplets that includes a CPU, a graphics processor, and an artificial intelligence accelerator, and send it over to a chip manufacturer like Intel and TSMC for fabrication.

The chiplet approach is favored over conventional monolithic designs as it provides a way to customize and manufacture chips for industries outside tech and consumer electronics. Chips are emerging as building blocks for industries like automotive, and major auto companies in the last two years had to shut down production of cars due to a shortage of chips.

Hardware companies such as AMD and Apple are already using the chiplet approach for PCs and servers. But industries have different requirements when it comes to types of chiplets to put in silicon. For example, the automotive industry will need electrical stability in chiplet designs to comply with federal safety regulations.

JEDEC and OCP are developing CDXML (Chip Data Exchange Markup Language) specification as a common language on the electrical, mechanical and thermal exchange standards between chiplets.

The specification will be a fundamental piece in ensuring companies can buy chiplets in an open marketplace and seamlessly integrate them with other modules to build silicon, which can then be sent for manufacturing. The standard is related to 2.5D or 3D stacked chiplet designs.

The specifications are constructed so it can be read in the electronic design automation process, which consists of software to design and simulate a chip before it is sent to manufacturing.

The CDXML schema is based on the neutral XML format. The standard borrows from many existing specifications that include JEDEC’s JEP181 thermal and JEP30-P101 electrical, mechanical and I/O standards, and also from IEEE 1687 testing and IEEE 2416 for power modeling standards. The CDXML fills many gaps for things like chiplets on the same substrate.

In a study published by OCP, data will travel between chiplets over very short distances, which is different from conventional dies where signaling happens over longer electrical distances. The energy consumptions on chiplets will need to be lower per bit, and efficiency needs to be achieved on the area, bandwidth, and other metrics.

“The charter of the group is to identify needs and develop guidance and standards for design automation data models that the chip designers need to buy chiplets from third parties and be successful in high volume manufacturing of chiplet-based integrated circuits,” OCP said in the study.

The CDXML standard creates a common workflow so chiplet designers and integrators can work together. The standardization could create an open marketplace and healthier supply chain with a free flow of designs and integration.

“The big idea is to enable the foundation for the creation of a market for chiplets as modeled after the silicon IP business for single chip silicon and components business for electronics parts,” OCP said.

The participants in the CDX study included top chipmakers such as Intel and Arm, which are also backing a chiplet standard called Universal Chiplet Interconnect Express (UCIe) standard, which is a high-bandwidth connector for chiplets to communicate inside a chip.

UCIe is an optimized version of PCI-Express for short-distance data travel, and supports a wide range of interconnects that include CXL. The optimized UCIe uses PCIe electricals for signaling, but how UCIe will connect with CDXML remains unclear.

 

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