Intel Debuts Tunnel Falls Quantum Chip and LQC Program to Work with It

By John Russell

June 15, 2023

Today, Intel announced its first silicon spin-based qubit quantum chip – Tunnel Falls – a 12-qubit research chip and a program intended to selectively share the new chip with developers for further exploration and refinement. Details about the chip itself (performance metrics and topology) were scant and the new access program seemed to be more about pursuing optimal design and performance features for Tunnel Falls.

Intel’s quantum computing messaging has been quite consistent: it encompasses the ideas that practical quantum computing remains many years distant; that leveraging proven CMOS semiconductor fabrication techniques is the only way to scale quantum computing to the millions of qubits required for fault-tolerance; and that NISQ (noisy intermediate scale quantum) devices, at least so far, show no signs of delivering quantum advantage.

These were the key points provided by Jim Clarke, director of quantum hardware, Intel Labs, at a media and analyst pre-briefing. The sparse details provided about the chip itself are in keeping with past practice around its quantum development. Intel has eschewed presenting detailed 5-year quantum roadmaps as IBM and others have done; Intel contends that the quantum development road ahead remains long and difficult to predict. (See HPCwire article, Intel Quantum Wisdom: Think Quantum is Powerful? You’re Right. Think it will Happen Soon. You’re Mistaken!)

While Intel is not alone in taking a conservative, long-term view of quantum development, it has sometimes been criticized as not keeping pace with quantum rivals and perhaps making a hedge-bet on quantum, something that Intel vigorously denies.

Jim Clarke, director of quantum hardware, Intel Labs, said, “Intel will deliver the entire full stack, a large-scale quantum computer [that’s] going to have our quantum chip, that’s going to have a host of control chips based on Intel technologies, [and] that’s probably going to have an HPC system or supercomputer connected. [We] view ourselves as a full stack solution. Do we sell systems? Or do we become a quantum as a service [provider] in the cloud? I think it’s too early to tell. So, let’s get the quantum system first, and some of those problems take care of themselves.”

Asked about Tunnel Falls’ performance metrics in a Q&A session, Clarke said. “There are many ways to look at this problem: coherence time, gate fidelity, gate time. What I would say is that we have characterized multiple qubit types for fidelity. We’re really pleased with the results. I think what I’ll do is avoid sharing specific numbers here, in the hopes that either we publish or one of our academic collaborators publishes in the near term. We wouldn’t be working on this technology if it wasn’t competitive now and didn’t have the hope of being the best one in the future.”

Schematic representation of an electron under 12-qubit quantum dot gates. Fabricated on 300-millimeter wafers, Tunnel Falls leverages Intel’s most advanced transistor fabrication capabilities, such as extreme ultraviolet lithography (EUV) and advanced materials processing techniques. This makes the chip a single electron transistor and allows Intel to fabricate Tunnel Falls with few changes to a standard complementary metal oxide semiconductor (CMOS) logic processing line.

Much of what Clarke covered in the briefing has been shared widely by Intel earlier, including for example, a presentation on how spin qubits work at Hot Chips in 2020. Since then Intel has talked most about its work on developing a cryo-electronics control system (e.g. Horse Ridge II) as well as its work on advancing the wafer-scale testing of quantum chips, which are fabricated on Intel’s advanced R&D facility. These are hardly trivial advances, but Intel has said little about its quantum chips themselves.

Clarke said yield – functional chips on 300mm wafers – currently has been 95 percent or higher.

In the official announcement, Clarke said, “Tunnel Falls is Intel’s most advanced silicon spin qubit chip to date and draws upon the company’s decades of transistor design and manufacturing expertise. The release of the new chip is the next step in Intel’s long-term strategy to build a full-stack commercial quantum computing system. While there are still fundamental questions and challenges that must be solved along the path to a fault-tolerant quantum computer, the academic community can now explore this technology and accelerate research development.”

When Intel launched its quantum SDK v 1.0 in February, there had been some anticipation that this 12-qubit device would become available to developers this year through the Intel Developer Cloud. Users of the Intel Quantum SDK are, generally speaking, working on higher level quantum algorithm and application development. Clarke is focused on hardware. Currently, the only access to Tunnel Falls is through the announced LQC collaboration, but the plan is eventually to offer access to developers on Intel’s Dev Cloud.

Jim Clark, Intel

“That is our goal to basically hook up the quantum SDK to the actual hardware. I think that what you’re seeing here is sort of a disaggregated approach. For the moment, we’re focusing on both (software and hardware) and we’ll bring these together. What I would say is that, from a physics perspective or electrical engineering perspective, there’s just an amazing amount of work to be done characterizing these devices. There’s a lot of papers to be written when we get these in the hands of the professors,” said Clarke.

The news in the announcement was largely that Intel is collaborating with the Laboratory for Physical Sciences (LPS) at the University of Maryland, College Park’s Qubit Collaboratory to provide access to Tunnel Falls.

The LPS Qubit Collaboratory (LQC) is one of the Department of Defense’s[i] national-level quantum information sciences (QIS) research centers established broadly as part of the National Quantum Initiative Act (2018). These are separate from Department of Energy’s six NQIS research centers. Intel is collaborating with LQC as part of the Qubits for Computing Foundry (QCF) program through the U.S. Army Research Office to provide Intel’s new quantum chip to research laboratories.

Intel says the collaboration with LQC will help democratize silicon spin qubits by enabling researchers to gain hands-on experience working with scaled arrays of these qubits. As described by Clarke, Intel will provide the quantum devices, currently Tunnel Falls, while research organizations would be responsible for acquiring and setting up needed infrastructure such as dilution refrigerators. Funds for the latter may be available through LQC. Intel doesn’t currently provide its Horse Ridge II cryo-control chips but might in the future.

The first quantum labs to participate in the Intel program include LPS, Sandia National Laboratories, the University of Rochester and the University of Wisconsin-Madison. LQC will work alongside Intel to make Tunnel Falls available to additional universities and research labs. The information gathered from these experiments will be shared with the community to advance quantum research and to help Intel improve qubit performance and scalability.

Tunnel Falls Chip in packaging. Intel’s Tunnel Falls is the first silicon spin qubit device released to research institutes and universities. It is fabricated on 300mm wafers and leverages Intel’s most advanced transistor fabrication capabilities.

Clarke said some organizations had the Intel quantum chip now, but didn’t say who. Included in the official Intel announcement were these stakeholder quotes:

“The LPS Qubit Collaboratory, in partnership with the Army Research Office, seeks to tackle the hard challenges facing qubit development and develop the next generation of scientists who will create the qubits of tomorrow,” said Charles Tahan, chief of Quantum Information Science, LPS. “Intel’s participation is a major milestone to democratizing the exploration of spin qubits and their promise for quantum information processing and exemplifies LQC’s mission to bring industry, academia, national labs, and government together.”

“Sandia National Laboratories is excited to be a recipient of the Tunnel Falls chip. The device is a flexible platform enabling quantum researchers at Sandia to directly compare different qubit encodings and develop new qubit operation modes, which was not possible for us previously,” said Dr. Dwight Luhman, distinguished member of technical staff at Sandia National Laboratories. “This level of sophistication allows us to innovate novel quantum operations and algorithms in the multi-qubit regime and accelerate our learning rate in silicon- based quantum systems. The anticipated reliability of Tunnel Falls will also allow Sandia to rapidly onboard and train new staff working in silicon qubit technologies.”

Mark A. Eriksson, department chair and John Bardeen Professor of Physics, Department of Physics, University of Wisconsin-Madison, said, “UW-Madison researchers, with two decades of investment in the development of silicon qubits, are very excited to partner in the launch of the LQC. The opportunity for students to work with industrial devices, which benefit from Intel’s microelectronics expertise and infrastructure, opens important opportunities both for technical advances and for education and workforce development.”

Part of what’s interesting here is Intel’s emphasis on continued hardware research. That suggests Intel is not ready to freeze a single prototype design for exploration by a wider software developer community. As with most qubit modalities, semiconductor-based spin qubits can be implemented in many ways. The barebones technology is being able to locate single electrons in isolated wells and to be able to control their spins so as to encode information in a quantum state (recent paper, Quantum Dots/Spin Qubits).

It turns out there are three approaches to making silicon spin qubits from these quantum dots, including the Loss-DiVencenzo configuration, the Single-Triplet (S-T0) configuration, and Exchange-only. See slides below.

“Each has a strength and weakness – where you can encode the qubit in one electron and one quantum dot; two electrons over two dots; or three electrons over three dots. Each has their strength and weakness from a fabrication perspective. Each has strengths and weaknesses from a physics perspective. Each would have their strengths and weaknesses from a scalability perspective. Then, as you map and schedule algorithms to it, there might be different constraints or possibilities for each type.

“At Intel, we’re looking at a couple of these. We’re looking as we tape out our next device, which is imminent, which type of qubit will map to that and at the same time, we’re designing the further one. We’re learning as we grow, which of these is most important. When it comes down to picking the best one and then putting all of our resources on that, I think you’ll see that in the next year or so from Intel. And the research community that we’re going to foster here will help us get there. Perhaps there’s a way of encoding that I haven’t even brought up here or haven’t thought of,” said Clarke.

Intel is examining many parameters, said Clarke, such as different quantum dots sizes, different geometries, different qubit lengths. Intel is also building test structures into its chip to help characterize performance. Presumably its collaborators through LQC will do the same. A few more details on Tunnel Falls itself would be welcome but don’t seem to be forthcoming soon.

The basic premise is this: “Intel believes silicon spin qubits are superior to other qubit technologies because of their synergy with leading- edge transistors. Being the size of a transistor, they are up to 1 million times smaller than other qubit types measuring approximately 50 nanometers square, potentially allowing for efficient scaling. According to Nature Electronics, ‘Silicon may be the platform with the greatest potential to deliver scaled-up quantum computing.’

“At the same time, utilizing advanced CMOS fabrication lines allows Intel to use innovative process control techniques to enable yield and performance. For example, the Tunnel Falls 12-qubit device has a 95% yield rate across the wafer and voltage uniformity similar to a CMOS logic process, and each wafer provides over 24,000 quantum dot devices. These 12-dot chips can form four to 12 qubits that can be isolated and used in operations simultaneously depending on how the university or lab operates its systems.” (excerpted from Intel announcement)

Before counting Intel out as a laggard in the race towards practical quantum computing, it is good to remember how long it took to move from the first transistor (1947) to the first microprocessor, the Intel 4004 in 1971, to the first million-transistor processor in 1989. Clarke emphasized the example and it’s a fair point.

Clarke noted, “Transistors are the most ubiquitous manmade objects on Earth. In fact, there have been predictions by the middle of this decade, there will be more transistors on Earth than human cells. To me, this is just mind blowing.”

Whether Intel’s extensive semiconductor manufacturing expertise and longer-view of quantum computing’s needed development time is a winner or whether accelerated development by the sheer number of quantum workers (governments et. al.) will shorten the race remains a lively debate.

Stay tuned.

Images courtesy of Intel

[i] The National Defense Authorization Acts of 2019 and 2020 called for Department of Defense participation in the NQI, including designation of DOD QIS Research Centers. https://www.lps.umd.edu/lps-qubit-collaboratory/

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