Convey Implements PacBioToCA Algorithm for 15x Acceleration

December 12, 2013

RICHARDSON, Tex., Dec. 12 — Convey Computer Corporation announced today the newest addition to Convey’s expanding bioinformatics suite, PacBioToCA, an application that facilitates the assembly of genomes sequenced withPacific Biosciences long-read technology. Optimized to take advantage of the highly parallel processing architecture of the Convey hybrid-core (HC) server, PacBioToCA delivers six to fifteen times acceleration.

Researchers running PacBioToCA on Convey HC systems for sequencing and assembly are seeing exceptional results. “The speed up is significant; but even more importantly, researchers are now able to test more parameters,” commented Dr. George Vacek, Director of Convey Computer’s Life Sciences business unit. “Achieving results in a matter of days instead of weeks allows them to refine their approach and get better answers.”

The PacBio RS II DNA Sequencing System, from Pacific Biosciences, helps scientists solve genetically complex problems. Their single-molecule sequencing instruments can generate industry-leading sequence read lengths that dramatically improve genome and transcriptome assembly.

Researchers are attracted to the exceptionally long PacBio reads because they can deliver higher quality assemblies. Prior to the development of algorithms optimized for PacBio read data (such as PacBioToCA), single-pass error rates had been perceived to limit their utility in de novo assembly.

Last year, Dr. Sergey Koren, Bioinformatics Scientist at the National Biodefense Analysis and Countermeasures Center, and his colleagues developed an assembly strategy that uses short sequences (either from PacBio circular consensus sequencing or short read technologies) typical of high-throughput sequencers to correct the errors in PacBio reads. This strategy was subsequently extended to use shorter single-molecule reads to correct the longest ones. These techniques deliver high-accuracy long reads, resulting in gold standard genome assemblies.

For larger genomes, the PacBioToCA algorithm can be time-consuming; therefore, Koren collaborated with Convey to optimize the PacBioToCA algorithm for Convey’s highly parallel HC systems. The optimized version of PacBioToCA runs much faster on the Convey HC servers because the alignment algorithm it uses is significantly faster on a Convey HC-2ex server than the best implementation on a standard server.

“It has been shown that long PacBio reads processed with PacBioToCA lead to such high-quality assemblies, researchers are saved the significant subsequent cost of manual finishing,” explained Kevin Corcoran, Senior Vice President of Market Development at Pacific Biosciences. “The combination of the PacBioToCA algorithm and a Convey HC system allows our customers to dramatically speed up research for projects in areas such as functional genomics, comparative genomics, and beyond.”

Convey’s groundbreaking hybrid-core computing architecture tightly integrates advanced computer architecture and compiler technology with commercial, off-the-shelf hardware—namely Intel Xeon processors and Xilinx Field Programmable Gate Arrays (FPGAs). Particular algorithms are optimized and translated into code that’s loaded onto the FPGAs at runtime to accelerate applications that use these algorithms. The systems help customers dramatically increase performance over industry standard servers while reducing energy costs associated with high-performance computing.

“Adding PacBioToCA to the Convey Bioinformatics Suite reflects our ongoing commitment to the bioinformatics and life sciences community,” concluded Vacek. “We enjoy working with innovators to bring solutions to the industry that will help solve the challenges of the rapidly changing area of sequencing. We look forward to continuing to collaborate with Pacific Biosciences and others on optimization of bioinformatics workflows.”

Convey’s expanding bioinformatics suite is made up of a number of personalities including the Convey GraphConstructor™ for de novo short read assembly, Smith-Waterman for local sequence alignment, and Burrows-Wheeler Aligner for fast reference mapping.

About Convey Computer Corporation

Based in Richardson, Texas, Convey Computer breaks power, performance and programmability barriers with the world’s first hybrid-core computer—a system that marries the low cost and simple programming model of a commodity system with the performance of a customized hardware architecture. Using the Convey hybrid-core systems, customers worldwide in industries such as life sciences, research, big data, and the government/military enjoy order of magnitude performance increases while reducing acquisition and operating costs. http://www.conveycomputer.com

—–

Source: Convey Computer Corporation

Subscribe to HPCwire's Weekly Update!

Be the most informed person in the room! Stay ahead of the tech trends with industy updates delivered to you every week!

SC Bids Farewell to Denver, Heads to Dallas for 30th

November 17, 2017

After a jam-packed four-day expo and intensive six-day technical program, SC17 has wrapped up another successful event that brought together nearly 13,000 visitors to the Colorado Convention Center in Denver for the larg Read more…

By Tiffany Trader

SC17 Keynote – HPC Powers SKA Efforts to Peer Deep into the Cosmos

November 17, 2017

This week’s SC17 keynote – Life, the Universe and Computing: The Story of the SKA Telescope – was a powerful pitch for the potential of Big Science projects that also showcased the foundational role of high performance computing in modern science. It was also visually stunning. Read more…

By John Russell

How Cities Use HPC at the Edge to Get Smarter

November 17, 2017

Cities are sensoring up, collecting vast troves of data that they’re running through predictive models and using the insights to solve problems that, in some cases, city managers didn’t even know existed. Speaking Read more…

By Doug Black

HPE Extreme Performance Solutions

Harness Scalable Petabyte Storage with HPE Apollo 4510 and HPE StoreEver

As a growing number of connected devices challenges IT departments to rapidly collect, manage, and store troves of data, organizations must adopt a new generation of IT to help them operate quickly and intelligently. Read more…

SC17 Student Cluster Competition Configurations: Fewer Nodes, Way More Accelerators

November 16, 2017

The final configurations for each of the SC17 “Donnybrook in Denver” Student Cluster Competition have been released. Fortunately, each team received their equipment shipments on time and undamaged, so the teams are r Read more…

By Dan Olds

SC Bids Farewell to Denver, Heads to Dallas for 30th

November 17, 2017

After a jam-packed four-day expo and intensive six-day technical program, SC17 has wrapped up another successful event that brought together nearly 13,000 visit Read more…

By Tiffany Trader

SC17 Keynote – HPC Powers SKA Efforts to Peer Deep into the Cosmos

November 17, 2017

This week’s SC17 keynote – Life, the Universe and Computing: The Story of the SKA Telescope – was a powerful pitch for the potential of Big Science projects that also showcased the foundational role of high performance computing in modern science. It was also visually stunning. Read more…

By John Russell

How Cities Use HPC at the Edge to Get Smarter

November 17, 2017

Cities are sensoring up, collecting vast troves of data that they’re running through predictive models and using the insights to solve problems that, in some Read more…

By Doug Black

Student Cluster LINPACK Record Shattered! More LINs Packed Than Ever before!

November 16, 2017

Nanyang Technological University, the pride of Singapore, utterly destroyed the Student Cluster Competition LINPACK record by posting a score of 51.77 TFlop/s a Read more…

By Dan Olds

Hyperion Market Update: ‘Decent’ Growth Led by HPE; AI Transparency a Risk Issue

November 15, 2017

The HPC market update from Hyperion Research (formerly IDC) at the annual SC conference is a business and social “must,” and this year’s presentation at S Read more…

By Doug Black

Nvidia Focuses Its Cloud Containers on HPC Applications

November 14, 2017

Having migrated its top-of-the-line datacenter GPU to the largest cloud vendors, Nvidia is touting its Volta architecture for a range of scientific computing ta Read more…

By George Leopold

HPE Launches ARM-based Apollo System for HPC, AI

November 14, 2017

HPE doubled down on its memory-driven computing vision while expanding its processor portfolio with the announcement yesterday of the company’s first ARM-base Read more…

By Doug Black

OpenACC Shines in Global Climate/Weather Codes

November 14, 2017

OpenACC, the directive-based parallel programming model used mostly for porting codes to GPUs for use on heterogeneous systems, came to SC17 touting impressive Read more…

By John Russell

US Coalesces Plans for First Exascale Supercomputer: Aurora in 2021

September 27, 2017

At the Advanced Scientific Computing Advisory Committee (ASCAC) meeting, in Arlington, Va., yesterday (Sept. 26), it was revealed that the "Aurora" supercompute Read more…

By Tiffany Trader

NERSC Scales Scientific Deep Learning to 15 Petaflops

August 28, 2017

A collaborative effort between Intel, NERSC and Stanford has delivered the first 15-petaflops deep learning software running on HPC platforms and is, according Read more…

By Rob Farber

Oracle Layoffs Reportedly Hit SPARC and Solaris Hard

September 7, 2017

Oracle’s latest layoffs have many wondering if this is the end of the line for the SPARC processor and Solaris OS development. As reported by multiple sources Read more…

By John Russell

Nvidia Responds to Google TPU Benchmarking

April 10, 2017

Nvidia highlights strengths of its newest GPU silicon in response to Google's report on the performance and energy advantages of its custom tensor processor. Read more…

By Tiffany Trader

Google Releases Deeplearn.js to Further Democratize Machine Learning

August 17, 2017

Spreading the use of machine learning tools is one of the goals of Google’s PAIR (People + AI Research) initiative, which was introduced in early July. Last w Read more…

By John Russell

GlobalFoundries Puts Wind in AMD’s Sails with 12nm FinFET

September 24, 2017

From its annual tech conference last week (Sept. 20), where GlobalFoundries welcomed more than 600 semiconductor professionals (reaching the Santa Clara venue Read more…

By Tiffany Trader

Amazon Debuts New AMD-based GPU Instances for Graphics Acceleration

September 12, 2017

Last week Amazon Web Services (AWS) streaming service, AppStream 2.0, introduced a new GPU instance called Graphics Design intended to accelerate graphics. The Read more…

By John Russell

EU Funds 20 Million Euro ARM+FPGA Exascale Project

September 7, 2017

At the Barcelona Supercomputer Centre on Wednesday (Sept. 6), 16 partners gathered to launch the EuroEXA project, which invests €20 million over three-and-a-half years into exascale-focused research and development. Led by the Horizon 2020 program, EuroEXA picks up the banner of a triad of partner projects — ExaNeSt, EcoScale and ExaNoDe — building on their work... Read more…

By Tiffany Trader

Leading Solution Providers

Reinders: “AVX-512 May Be a Hidden Gem” in Intel Xeon Scalable Processors

June 29, 2017

Imagine if we could use vector processing on something other than just floating point problems.  Today, GPUs and CPUs work tirelessly to accelerate algorithms Read more…

By James Reinders

Delays, Smoke, Records & Markets – A Candid Conversation with Cray CEO Peter Ungaro

October 5, 2017

Earlier this month, Tom Tabor, publisher of HPCwire and I had a very personal conversation with Cray CEO Peter Ungaro. Cray has been on something of a Cinderell Read more…

By Tiffany Trader & Tom Tabor

Cray Moves to Acquire the Seagate ClusterStor Line

July 28, 2017

This week Cray announced that it is picking up Seagate's ClusterStor HPC storage array business for an undisclosed sum. "In short we're effectively transitioning the bulk of the ClusterStor product line to Cray," said CEO Peter Ungaro. Read more…

By Tiffany Trader

AMD Showcases Growing Portfolio of EPYC and Radeon-based Systems at SC17

November 13, 2017

AMD’s charge back into HPC and the datacenter is on full display at SC17. Having launched the EPYC processor line in June along with its MI25 GPU the focus he Read more…

By John Russell

Intel Launches Software Tools to Ease FPGA Programming

September 5, 2017

Field Programmable Gate Arrays (FPGAs) have a reputation for being difficult to program, requiring expertise in specialty languages, like Verilog or VHDL. Easin Read more…

By Tiffany Trader

HPC Chips – A Veritable Smorgasbord?

October 10, 2017

For the first time since AMD's ill-fated launch of Bulldozer the answer to the question, 'Which CPU will be in my next HPC system?' doesn't have to be 'Whichever variety of Intel Xeon E5 they are selling when we procure'. Read more…

By Dairsie Latimer

IBM Advances Web-based Quantum Programming

September 5, 2017

IBM Research is pairing its Jupyter-based Data Science Experience notebook environment with its cloud-based quantum computer, IBM Q, in hopes of encouraging a new class of entrepreneurial user to solve intractable problems that even exceed the capabilities of the best AI systems. Read more…

By Alex Woodie

How ‘Knights Mill’ Gets Its Deep Learning Flops

June 22, 2017

Intel, the subject of much speculation regarding the delayed, rewritten or potentially canceled “Aurora” contract (the Argonne Lab part of the CORAL “ Read more…

By Tiffany Trader

  • arrow
  • Click Here for More Headlines
  • arrow
Share This