March 30, 2020 — If Lagarto, the first open source processor developed in Spain and Mexico, was introduced in December, now DRAC is presented. It is a project to develop a new processor and several open source accelerators. DRAC (Designing RISC-V-based Accelerators for next generation Computers) is a new step in research led by the Barcelona Supercomputing Center (BSC) to manufacture open source chips from Europe. The project has the collaboration of the Polytechnic University of Catalonia (UPC), the University of Barcelona (UB), the Autonomous University of Barcelona (UAB) and the Rovira i Virgili University (URV).

The objective of DRAC is to manufacture a processor and several accelerators to be used in security tasks (encryption or protection from attacks against hardware, for example), personalized medicine (especially genomic analysis) and autonomous navigation (cars and other vehicles).

Both the processor and accelerators will be based on the RISC-V technology, which is the architecture with ISA (nomenclature that refers to the Instruction Set Architecture) open source chosen by the BSC for Lagarto and for the accelerator being developed in the EPI (European Processor Initiative) project.

The DRAC project will draw on the knowledge and experience acquired during the last years by the BSC, in its strategy to promote the development of European computing technologies. “We are very happy that an increasingly wider community is being created, dedicated to research in open source computing architecture technologies. It is a strategic issue for Europe, because we need them to strengthen our technological sovereignty and the competitiveness of our companies, and it is also a strategic issue for our country, if we know how to create a pole where institutions and companies work together with this objective”, says Mateo Valero, director of the BSC and promoter of the initiative.

The DRAC project, framed in the emerging technology groupings of the Research and Innovation Strategy for innovation in Catalonia (RIS3CAT), will receive funding of four million euros, 50% of which comes from ERDF funds and the other 50% of the participants in the project. The project, which has an expected duration of three years, will involve around 40 researchers, coordinated by Miquel Moretó, Ramón y Cajal researcher at the UPC and the BSC.

“The project allows us to create an infrastructure dedicated to the design and production of entirely Catalan processors,” said Ángel Diéguez, UB. “From the point of view of manufacturing, for which we are responsible in DRAC, the processor will be made through the European consortium EUROPRACTICE, which facilitates access to leading technologies at reasonable prices to universities and research centers.”

“From a security point of view, RISC-V is a very interesting bet due to its transparency,” Oriol Farràs, URV said. “Many of the cryptographic schemes we use on a daily basis in digital communications may be vulnerable within a few years. This will depend on the achievements made in the field of quantum computing. If this time comes, we should replace these schemes with schemes called “post-quantum”. In this project, we will design secure accelerators so that these post-quantum schemes can be executed more efficiently”.

“The DRAC project will allow progress in the technology for processing large amounts of genomic sequencing data,” Toni Espinosa, UAB said. “The project will develop new bioinformatic algorithms optimized for the new RISC-V architectures that will allow greater performance of current life science data processing flows.”

“The DRAC project will rely on the success of the Lagarto processor to develop new, more powerful general purpose processors, as well as accelerators for relevant applications such as personalized medicine, autonomous navigation or security,” Miquel Moretó, coordinador said. “These designs will be manufactured using recent technology nodes and they will create very interesting synergies with the EPI project and the Catalan research and business ecosystem.”

About BSC

Barcelona Supercomputing Center-Centro Nacional de Supercomputación (BSC-CNS) is the national supercomputing centre in Spain. The center is specialised in high performance computing (HPC) and manage MareNostrum, one of the most powerful supercomputers in Europe, located in the Torre Girona chapel. BSC is involved in a number of projects to design and develop energy efficient and high performance chips, based on open architectures like RISC-V, for use within future exascale supercomputers and other high performance domains. The centre leads the pillar of the European Processor Project (EPI), creating a high performance accelerator based on RISC-V. More information: www.bsc.es

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Source: Barcelona Supercomputing Center