Sept. 29, 2020 — A oneAPI Academic Center of Excellence (CoE) is now established at the Heidelberg University Computing Center (URZ). The new CoE will conduct research supporting the oneAPI industry initiative to create a uniform, open programming model for heterogeneous computer architectures.
A common language for heterogeneous computing
URZ will focus its research and programming efforts on a fundamental high-performance computing (HPC) challenge where modern computers utilize different types of hardware for different calculations. Accelerators, including graphics processing units (GPUs) and field programmable gate arrays (FPGAs), are used in combination with general compute processors (CPUs). Using different types of hardware make computers very powerful and provide versatility for a wide range of situations and workloads. However, hardware heterogeneity complicates software development for these computers, especially when specialized components from a variety of vendors are used in tandem.
One major reason for this complication is that many accelerated compute architectures require their own programming models. Therefore, software developers need to learn and use a different – and sometimes proprietary – language for each processing unit in a heterogeneous system, which increases complexity and limits flexibility.
oneAPI’s cross-architecture language Data Parallel C++ (DPC++), based on Khronos Groups’ SYCL standard for heterogeneous programming in C++, overcomes these challenges with its single, unified open development model for performant and productive heterogeneous programming and cross-vendor support.
Developing for Heterogeneous Systems: advancing features and capabilities, maximizing interoperability
URZ’s work as a oneAPI CoE will add advanced DPC++ capabilities into hipSYCL, which supports systems based on AMD GPUs, NVIDIA GPUs, and CPUs. New DPC++ extensions are part of the SYCL 2020 provisional specification that brings features such as unified shared memory to hipSYCL and the platforms it supports – furthering the promise of oneAPI application support across system architectures and vendors.
URZ HPC technical specialist Aksel Alpay, who created hipSYCL, leads its on-going development.” The whole project is quite ambitious,” says Alpay, venturing a look into the future. “hipSYCL is an academic research project as well as a development project, where the final product will be used in production operations. It is incredibly exciting to bring DPC++ and SYCL 2020 capabilities to additional architectures, such as AMD GPUs.”
To expedite the research, URZ researchers and developers will access an international network of experts at Intel and numerous academic and government institutions – a great advantage to advance hipSYCL capabilities and further the goal of the oneAPI initiative. “For a scientific computing center to have access to this level of expertise and work together on an open standard with partners from around the globe, is a wonderful prospect,” states Heidelberg University’s CIO and URZ director Prof. Dr. Vincent Heuveline, who is a major proponent of the CoE. In addition to being the university’s main liaison for the center, he will function as its scientific advisor.
“One of our strategic goals is to make a measurable contribution to the transfer of new technologies from research to industrial application, and of course to continuously expand our expertise and research efforts in the field of supercomputing. The oneAPI CoE will allow us to do both,” explains Heuveline.
“oneAPI is a true cross-industry initiative that seeks to simplify development of diverse workloads by streamlining code re-use across a variety of architectures through an open and collaborative approach. URZ’s research helps to deliver on the cross-vendor promise of oneAPI by expanding advanced DPC++ application support to other architectures,” says Dr. Jeff McVeigh, Intel vice president of Datacenter XPU Products and Solutions.
oneAPI is an industry initiative to create a single, unified, cross-architecture programming model for CPUs + accelerator architectures. Based on industry standards and its open development approach, the initiative will help streamline software development for high performance computers, increase performance, and provide specifications for efficient and diverse architecture programming.
Source: Heidelberg University