RISC-V International Reports Another Strong Year of Growth with New Technical Milestones, Educational Programs, RISC-V Adoption and More

December 8, 2020

ZURICH, Dec. 8, 2020 — RISC-V International, a non-profit corporation controlled by its members to drive the adoption and implementation of the free and open RISC-V instruction set architecture (ISA), highlighted the organization’s incredible year of growth in a keynote today by Calista Redmond, CEO of RISC-V International, at the RISC-V Summit, which is being held virtually from Dec. 8-10, 2020. This year RISC-V International has made significant progress on technical deliverables, launched new educational programs, expanded its leadership team and membership base, and has continued to see strong commercial adoption.

“RISC-V has had an incredible year of growth and momentum. This year, our technical community has grown 66 percent to more than 2,300 individuals in our more than 50 technical and special interest groups. We’re seeing increased market momentum of RISC-V cores, SoCs, developer boards, software and tools across computing from embedded to enterprise,” said Redmond. “We’re proud of our growing global membership, which has doubled in the last year to more than 900 total members, including 215 organizations.”

In 2020 RISC-V continued to focus on driving progression and closure on standards and technical deliverables. In March, the RISC-V Processor Trace Task Group ratified the processor trace specification, a new standard trace encoder algorithm that allows engineers and developers to see exactly what instructions a core is executing, step by step. The RISC-V Technical Steering Committee (TSC) focused on implementing organizational governance practices to increase transparency. The RISC-V Architecture Test Working Group initiated a compatibility framework and tests to help developers ensure their solutions are in accordance with the specification. Additionally, RISC-V International and GlobalPlatform, the standard for secure digital services and devices, announced a partnership to help accelerate the development of open standards that simplify security design for hardware developers and enhance the security of Internet of Things (IoT) devices and processors. RISC-V anticipates the Q1 2021 public review for our Vector, Bit Manipulation, Scalar Cryptography, Packed SIMD, Secure PMP and Virtual Memory extensions. RISC-V is also creating a security response process to better respond to potential security issues and innovative cryptography extensions to enhance performance in secure deployments.

RISC-V International has cultivated alliances with 16 different regional and industry groups to ensure collaboration across all boundaries and interests. Three of these projects, which are already in motion, include: China Academy of Sciences and PLCT Lab are working on low level virtual machine (LLVM) and GNU Compiler Collection (GCC) projects for unprivileged instructions; Shakti and IIT Madras are working on architecture tests for unprivileged instructions; and the RISC-V International Open Source Laboratory (RIOS Lab) are working on both the formal model and architecture tests for privileged instructions.

In June 2020, RISC-V International appointed Mark Himelstein as CTO to work with the RISC-V technical community to understand, define and lead strategic imperatives from ISA extensions to software and from embedded to high performance computing (HPC), with all members’ interests in mind. The organization further expanded its leadership team with the appointment of Kim McMahon as Director of Marketing to increase the visibility of RISC-V and amplify the growing industry momentum of our member community. RISC-V International also announced the first class of RISC-V Ambassadors this year. Ambassadors are RISC-V technical experts from around the world who work together with RISC-V to engage engineers around the world in technical forums.

Said Himelstein: “RISC-V has been laser focused on ratifying extensions, identifying  and addressing opportunities and gaps, and expanding collaboration and development across markets to strengthen the community and access to RISC-V resources. In 2020 we’ve expanded the number of technical groups, forged new alliances and rolled out new educational programs to help accomplish this goal, and will continue to double down on these efforts to help fuel volume deployments of RISC-V in the coming years.”

RISC-V International has launched three new learning programs including the RISC-V Training Partner Program, Learn online, and university alliances to extend the breadth and reach of RISC-V knowledge, provide opportunities for a broader audience to teach and learn, and engage the community to achieve expertise in the critical areas needed for a healthy ecosystem. One of the courses that was recently unveiled is the Imagination University Programme (IUP) course “RVfpga: Understanding Computer Architecture.” The course is currently available in English, and a Chinese version will be available in early 2021. Students and developers interested in RISC-V can also check out more than 30 educational courses on RISC-V offered from universities and other educational providers from around the world.

This year the RISC-V community has continued to contribute to RISC-V projects, collaborate together and commercialize RISC-V hardware and software solutions. RISC-V also launched the RISC-V Exchange with more than 124 RISC-V cores and SoCs and Developer Boards along with 129 RISC-V software applications and tools.

Notable examples of RISC-V adoption in 2020:

●        Alibaba unveiled its RV64GCV core that will be used for its Xuantie 910 processor aimed at cloud and edge servers.

●       Andes released new superscalar multicore processors and processors with Level-2 (L2) cache controller.

●        BBC Learning and Tynker released the BBC Doctor Who HiFive Inventor to engage the next generation of coders.

●        Bluespec, Inc. unveiled RISC-V Explorer, a fast, free and accurate way to evaluate RISC-V cores.

●        CHIPS Alliance announced new enhancements to the SweRV Core EH2 and SweRV Core EL2.

●        Codasip released Bk7, optimized for domain-specific applications such as security and real-time AI processing, especially where embedded Linux is required.

●        De-RISC developed the first version of its De-RISC MPSoC platform and Performance Monitoring Unit as part of its effort to create a RISC-V platform for the aerospace market.

●        Esperanto Technologies unveiled an accelerator chip for large-scale machine learning applications employing over 1000 RISC-V cores.

●        Espressif launched cost-effective microcontroller with Wi-Fi and Bluetooth LE 5.0 connectivity for secure IoT applications.

●        GreenWaves Technologies announced its ultra-low power GAP9 hearables platform that enables scene-aware active noise cancellation and neural network-based noise reduction.

●        Huami released a new AI chip for biometric wearables.

●        IAR Systems partnered with GigaDevice to deliver powerful development tools for GigaDevice’s RISC-V based microcontrollers.

●        IAR Systems and SiFive enhanced support for the SiFive Insight solution in IAR Embedded Workbench to bring leading debug and trace capabilities to the RISC-V community.

●        Imagination Technologies partnered with RIOS Laboratory to enable RIOS Lab to build a complete development platform and open-source ecosystem for RISC-V single-board computers.

●        Imperas Software debuted a reference model with UVM encapsulation for RISC-V verification.

●        Lynred and GreenWaves Technologies collaborated on a new Occupancy Management Reference Platform for people counting sensors.

●        MEEP developed Coyote, a performance modeling tool to provide an execution-driven simulation environment for multicore RISC-V systems with multi-level memory hierarchies.

●        Mentor collaborated with Imperas on RISC-V core RTL coverage driven design verification analysis.

●        Microchip Technology announced a RISC-V-based SoC FPGA development kit to accelerate customer design deployment and commercial adoption across a variety of industries.

●        Micro Magic, Inc. unveiled a 64-bit RISC-V core achieving 5GHz and 13,000 CoreMarks at 1.1V.

●        NeuLinker selected Codasip’s Bk5 core and the Codasip Studio customization toolset for its security and AI-powering solutions.

●        OneSpin announced it is contributing its processor integrity solutions for the German government’s ZuSE-Scale4Edge project to assure integrity of edge computing processors.

●        OpenHW Group implemented Imperas RISC-V reference models for coverage driven verification of open source CORE-V processor IP cores.

●        PINE64 unveiled the Pinecil TS100 compatible soldering iron.

●        SiFive introduced HiFive Unmatched! to make it easy for developers to build a RISC-V PC.

●        Telink Semiconductor announced its TLSR9r SoC series for wireless audio, wearable devices and other cutting-edge IoT applications.

●        The European Processor Initiative finalized the first version of its RISC-V accelerator architecture, named EPAC.

●        Think Silicon introduced new inference micro GPU architecture suitable for AI-Vision and graphics tasks.

●        University of Chinese Academy of Sciences (UCAS) developed NutShell, a 64-bit SoC which operates at up to 200MHz and can run Linux.

In March 2020, RISC-V International was incorporated in Switzerland. As part of the move, RISC-V shifted to a new, more inclusive membership structure. RISC-V International is a truly global organization, with 31 percent of its membership base in North America, 33 percent in Europe and 37 percent in Asia-Pacific. To engage with the global RISC-V community, RISC-V International has participated in nearly 40 events ranging from Embedded World and HiPEAC in Europe to DAC and Open Source Summit in North America to regional events in China and Taiwan.

To learn more about the free and open RISC-V ISA, please visit: https://riscv.org. To become a member of RISC-V International, please visit: https://riscv.org/membership/.

About RISC-V International

RISC-V (pronounced “risk-five”) is a free and open ISA enabling a new era of processor innovation through open standard collaboration. Founded in 2015, RISC-V International comprises more than 900 members building the first open, collaborative community of software and hardware innovators powering a new era of processor innovation. Born in academia and research, RISC-V ISA delivers a new level of free, extensible software and hardware freedom on architecture, paving the way for the next 50 years of computing design and innovation.

RISC-V International, a non-profit organization controlled by its members, directs the future development and drives the adoption of the RISC-V ISA. Members of RISC-V International have access to and participate in the development of the RISC-V ISA specifications and related HW / SW ecosystem.

Source: RISC-V International

Subscribe to HPCwire's Weekly Update!

Be the most informed person in the room! Stay ahead of the tech trends with industry updates delivered to you every week!

AI Saves the Planet this Earth Day

April 22, 2024

Earth Day was originally conceived as a day of reflection. Our planet’s life-sustaining properties are unlike any other celestial body that we’ve observed, and this day of contemplation is meant to provide all of us Read more…

Intel Announces Hala Point – World’s Largest Neuromorphic System for Sustainable AI

April 22, 2024

As we find ourselves on the brink of a technological revolution, the need for efficient and sustainable computing solutions has never been more critical.  A computer system that can mimic the way humans process and s Read more…

Empowering High-Performance Computing for Artificial Intelligence

April 19, 2024

Artificial intelligence (AI) presents some of the most challenging demands in information technology, especially concerning computing power and data movement. As a result of these challenges, high-performance computing Read more…

Kathy Yelick on Post-Exascale Challenges

April 18, 2024

With the exascale era underway, the HPC community is already turning its attention to zettascale computing, the next of the 1,000-fold performance leaps that have occurred about once a decade. With this in mind, the ISC Read more…

2024 Winter Classic: Texas Two Step

April 18, 2024

Texas Tech University. Their middle name is ‘tech’, so it’s no surprise that they’ve been fielding not one, but two teams in the last three Winter Classic cluster competitions. Their teams, dubbed Matador and Red Read more…

2024 Winter Classic: The Return of Team Fayetteville

April 18, 2024

Hailing from Fayetteville, NC, Fayetteville State University stayed under the radar in their first Winter Classic competition in 2022. Solid students for sure, but not a lot of HPC experience. All good. They didn’t Read more…

AI Saves the Planet this Earth Day

April 22, 2024

Earth Day was originally conceived as a day of reflection. Our planet’s life-sustaining properties are unlike any other celestial body that we’ve observed, Read more…

Kathy Yelick on Post-Exascale Challenges

April 18, 2024

With the exascale era underway, the HPC community is already turning its attention to zettascale computing, the next of the 1,000-fold performance leaps that ha Read more…

Software Specialist Horizon Quantum to Build First-of-a-Kind Hardware Testbed

April 18, 2024

Horizon Quantum Computing, a Singapore-based quantum software start-up, announced today it would build its own testbed of quantum computers, starting with use o Read more…

MLCommons Launches New AI Safety Benchmark Initiative

April 16, 2024

MLCommons, organizer of the popular MLPerf benchmarking exercises (training and inference), is starting a new effort to benchmark AI Safety, one of the most pre Read more…

Exciting Updates From Stanford HAI’s Seventh Annual AI Index Report

April 15, 2024

As the AI revolution marches on, it is vital to continually reassess how this technology is reshaping our world. To that end, researchers at Stanford’s Instit Read more…

Intel’s Vision Advantage: Chips Are Available Off-the-Shelf

April 11, 2024

The chip market is facing a crisis: chip development is now concentrated in the hands of the few. A confluence of events this week reminded us how few chips Read more…

The VC View: Quantonation’s Deep Dive into Funding Quantum Start-ups

April 11, 2024

Yesterday Quantonation — which promotes itself as a one-of-a-kind venture capital (VC) company specializing in quantum science and deep physics  — announce Read more…

Nvidia’s GTC Is the New Intel IDF

April 9, 2024

After many years, Nvidia's GPU Technology Conference (GTC) was back in person and has become the conference for those who care about semiconductors and AI. I Read more…

Nvidia H100: Are 550,000 GPUs Enough for This Year?

August 17, 2023

The GPU Squeeze continues to place a premium on Nvidia H100 GPUs. In a recent Financial Times article, Nvidia reports that it expects to ship 550,000 of its lat Read more…

Synopsys Eats Ansys: Does HPC Get Indigestion?

February 8, 2024

Recently, it was announced that Synopsys is buying HPC tool developer Ansys. Started in Pittsburgh, Pa., in 1970 as Swanson Analysis Systems, Inc. (SASI) by John Swanson (and eventually renamed), Ansys serves the CAE (Computer Aided Engineering)/multiphysics engineering simulation market. Read more…

Intel’s Server and PC Chip Development Will Blur After 2025

January 15, 2024

Intel's dealing with much more than chip rivals breathing down its neck; it is simultaneously integrating a bevy of new technologies such as chiplets, artificia Read more…

Choosing the Right GPU for LLM Inference and Training

December 11, 2023

Accelerating the training and inference processes of deep learning models is crucial for unleashing their true potential and NVIDIA GPUs have emerged as a game- Read more…

Baidu Exits Quantum, Closely Following Alibaba’s Earlier Move

January 5, 2024

Reuters reported this week that Baidu, China’s giant e-commerce and services provider, is exiting the quantum computing development arena. Reuters reported � Read more…

Comparing NVIDIA A100 and NVIDIA L40S: Which GPU is Ideal for AI and Graphics-Intensive Workloads?

October 30, 2023

With long lead times for the NVIDIA H100 and A100 GPUs, many organizations are looking at the new NVIDIA L40S GPU, which it’s a new GPU optimized for AI and g Read more…

Shutterstock 1179408610

Google Addresses the Mysteries of Its Hypercomputer 

December 28, 2023

When Google launched its Hypercomputer earlier this month (December 2023), the first reaction was, "Say what?" It turns out that the Hypercomputer is Google's t Read more…


How AMD May Get Across the CUDA Moat

October 5, 2023

When discussing GenAI, the term "GPU" almost always enters the conversation and the topic often moves toward performance and access. Interestingly, the word "GPU" is assumed to mean "Nvidia" products. (As an aside, the popular Nvidia hardware used in GenAI are not technically... Read more…

Leading Solution Providers


Shutterstock 1606064203

Meta’s Zuckerberg Puts Its AI Future in the Hands of 600,000 GPUs

January 25, 2024

In under two minutes, Meta's CEO, Mark Zuckerberg, laid out the company's AI plans, which included a plan to build an artificial intelligence system with the eq Read more…

China Is All In on a RISC-V Future

January 8, 2024

The state of RISC-V in China was discussed in a recent report released by the Jamestown Foundation, a Washington, D.C.-based think tank. The report, entitled "E Read more…

Shutterstock 1285747942

AMD’s Horsepower-packed MI300X GPU Beats Nvidia’s Upcoming H200

December 7, 2023

AMD and Nvidia are locked in an AI performance battle – much like the gaming GPU performance clash the companies have waged for decades. AMD has claimed it Read more…

Nvidia’s New Blackwell GPU Can Train AI Models with Trillions of Parameters

March 18, 2024

Nvidia's latest and fastest GPU, codenamed Blackwell, is here and will underpin the company's AI plans this year. The chip offers performance improvements from Read more…

Eyes on the Quantum Prize – D-Wave Says its Time is Now

January 30, 2024

Early quantum computing pioneer D-Wave again asserted – that at least for D-Wave – the commercial quantum era has begun. Speaking at its first in-person Ana Read more…

GenAI Having Major Impact on Data Culture, Survey Says

February 21, 2024

While 2023 was the year of GenAI, the adoption rates for GenAI did not match expectations. Most organizations are continuing to invest in GenAI but are yet to Read more…

The GenAI Datacenter Squeeze Is Here

February 1, 2024

The immediate effect of the GenAI GPU Squeeze was to reduce availability, either direct purchase or cloud access, increase cost, and push demand through the roof. A secondary issue has been developing over the last several years. Even though your organization secured several racks... Read more…

Intel’s Xeon General Manager Talks about Server Chips 

January 2, 2024

Intel is talking data-center growth and is done digging graves for its dead enterprise products, including GPUs, storage, and networking products, which fell to Read more…

  • arrow
  • Click Here for More Headlines
  • arrow