People to Watch 2017

Avinash Sodani
Distinguished Engineer

Prior to joining Cavium, Avinash Sodani served as a Principal Engineer at Intel Corporation, and was the Chief Architect of the Knights Landing Xeon Phi processor, responsible for the processor’s architecture and definition. Previously, he was one of the primary architects of the 1st generation Core i7/i5/i3 processor, called Nehalem, where he was responsible for the architecture of the “out-of-order schedule” cluster of the core. Avinash has worked as a server architect for the Xeon line of products, covering Westmere servers and early work on Haswell servers. He has also worked briefly as a system architect for a processor targeting game consoles. Avinash has a PhD in Computer Architecture and Masters in Computer Science from University of Wisconsin-Madison and has a B.Tech in Computer Science and Engineering from IIT Kharagpur in India.

HPCwire: Having played a leadership role in Intel Knights Landing development and now working with Cavium’s ARM efforts, you have an unusual perspective on the uses for each architecture. Broadly speaking, how do you differentiate between the two?

Avinash Sodani: Both ARM and x86 are well established architectures – ARM in smartphones and tablets, while x86 in laptops and servers. ARM is a more open architecture with several vendors and foundries building chips for it. This has created a strong momentum behind the ARM architecture, creating opportunities to design processors optimized for different segments. Historically, ARM has seen very power efficient designs because of it lineage from mobile devices. This sets it up well for providing very power efficient designs for other market segments as well, such as servers.

By far the most critical aspect of an architecture is the software (SW) eco-system built around it. That is the life blood of an architecture. It ensures that systems designed around an architecture have enough support software available for them to be easily usable. ARM has a very vibrant software eco-system in smartphones and tablets. This ecosystem is growing fast in server space as well, with many OSes, tools and compilers (Red Hat, SuSe, Ubuntu, GCC, etc.) providing support for it. This is something that was missing for other non-x86 architectures. That’s one of the reasons why those architectures went away or got reduced to very small niches. X86 also has a strong software eco-system. Overall, ARM is emerging as a credible alternate architecture with its strengthening SW eco-system and competitive hardware solutions. This bodes well for the broader community.

HPCwire: What are you most excited about for ARM’s future? Do you see it becoming a mainstream server processor and if so, how soon?

As I mentioned above, ARM is a very well established architecture by virtue of its dominance is smartphone and tablet segment. It has a strong and fast growing software eco-system. It has a legacy of power efficient processor implementations. All this sets it up well to also make deep forays in segments outside smartphones and tablets, including server and HPC. This makes it an exciting time to be working in ARM space. High end ARM CPUs will be hitting the market in 2017. For the first time ARMv8 bases server systems will start becoming competitive on performance. I see ARM at a tipping point starting in 2017 and expect to see significant acceleration over the next 2-3 years.

HPCwire: What trends in high performance computing do you see as particularly relevant as you look forward to the year ahead?

I already mentioned high-end ARM CPUs hitting the market next year. Two other trends stand out – the advent of machine learning (ML) and the emergence of high bandwidth on-package memories. They will be very relevant to HPC, in my mind, in coming year and beyond.

ML is getting applied to wide range of problems. It is a very different way to arrive at a solution – instead of programming an algorithm to solve a problem, it lets the computer develop a model (learn) to solve the problem by training on copious amount of available data. This trend will start influencing scientists on how they solve some of their problems, which in turn will have an impact on how we design HPC systems, HPC algorithms, and software tools.

High bandwidth memory is another trend that is emerging. Systems with in-package memory are already shipping. HPC applications have insatiable need for memory bandwidth and this trend is feeding into that. This trend will permanently change the memory architecture for HPC systems in the future. It will also influence the software, as developers start to figure out how best to use these high bandwidth memories most efficiently.

HPCwire: Outside of the professional sphere, what can you tell us about yourself – personal life, family, background, hobbies, etc.? Is there anything about you your colleagues might be surprised to learn?

Outside work, my time mainly goes in two places: my family and cricket! I’m married and have two sons – one is high-school and one in elementary. They keep me quite busy with all kinds of activities. I have coached a kid’s Lego Robotics team for 5 years. I’m an ardent cricket fan. I actively play and follow the sport passionately. During summers, many of my weekends go into playing matches in local cricket leagues.

Ian Buck
Adolfy Hoisie
John Martinis
Satoshi Matsuoka
Paul Messina
Bernd Mohr
Andrew Ng
Kirk Skaugen
Avinash Sodani
Lisa Su
Jeffrey Vetter
 Guangwen Yang


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