Tag: heterogeneous computing
The three-year European SAVE project, which wraps up this week, has produced tools and technologies that can help reduce heterogeneous system architecture (HSA) energy costs by 20 percent say its organizers. SAVE is the somewhat abbreviated acronym for Self-Adaptive Virtualization-Aware High-Performance/Low-Energy Heterogeneous System Architectures, a EU collaborative research project, funded by the EU’s Seventh Framework Read more…
<img style=”float: left;” src=”http://media2.hpcwire.com/hpcwire/FirePro_w9000_small.png” alt=”” width=”115″ height=”96″ />Advanced Micro Devices (AMD) has launched six new FirePro processors for workstation users who want high-end graphics and computation in a single box. One of them promises a teraflop of double precision performance as well as support for error correcting code (ECC) memory. The new offerings also includes two APUs (Accelerated Processing Units) that glue four CPU cores and hundreds of FirePro GPU stream cores onto the same chip.
I<img style=”float: left;” src=”http://media2.hpcwire.com/hpcwire/computer_chips_on_die_small.jpg” alt=”” width=”102″ height=”93″ />ntel, AMD, NVIDIA, and Whamcloud have been awarded tens of millions of dollars by the US Department of Energy (DOE) to kick-start research and development required to build exascale supercomputers. The work will be performed under the FastForward program, a joint effort run by the DOE Office of Science and the National Nuclear Security Administration (NNSA) that will focus on developing future hardware and software technologies capable of supporting such machines.
With the race to crack the exaflops barrier underway, one project is looking to use some of the least powerful processors in the industry.
<img style=”float: left;” src=”http://media2.hpcwire.com/hpcwire/green_mb.bmp” alt=”” width=”109″ height=”91″ />There are several approaches being developed to program heterogeneous systems, but none of them have proven to successfully address the real goal. This article will discuss a range of potentially interesting heterogeneous systems for high performance computing, why programming them is hard, and why developing a high level programming model is even harder.
<img style=”float: left;” src=”http://media2.hpcwire.com/hpcwire/AMD_APU_small.jpg” alt=”” width=”97″ height=”68″ />Last week, AMD used its Financial Analyst Day to talk up heterogeneous computing, the technology that the company is betting on to be the next “big thing” in the microprocessor business. To that end, company execs explained how their newly hatched Heterogeneous System Architecture (HSA) will evolve over the next three years to drive their product roadmap forward.
Software maker offers heterogeneous computing in a C++ wrapper.
<img style=”float: left;” src=”http://media2.hpcwire.com/hpcwire/AMD_generic_chip.bmp” alt=”” width=”101″ height=”71″ />AMD is plotting a relatively conservative roadmap for its Opteron CPUs over the next year or two, even as it preps its heterogenous computing technology for the big leap into the server arena. At the company’s 2012 Financial Analyst Day last week, AMD execs re-pledged their commitment to the server market and outlined a strategy that puts less emphasis on high performance cores and design complexity and more on power efficiency and building SoC products tailored to specific datacenter workloads.
Analyst firm says the new paradigm will be the basis for exascale computing.
Penguin Computing builds experimental supercomputer with heterogeneous CPU-GPU processors.