Chip Market Soared on Memory Demand

February 8, 2018

Global spending on semiconductors jumped a hefty 17 percent in 2017, driven by demand and corresponding price hikes for memory in datacenters and early industri Read more…

By George Leopold

IBM Demonstrates In-memory Computing with 1M PCM Devices

October 30, 2017

Last week IBM reported successfully using one million phase change memory (PCM) devices to implement and demonstrate an unsupervised learning algorithm running Read more…

By John Russell

MIT, ETH Develop Scheme to Boost On-package DRAM Performance 50%

October 24, 2017

It’s no secret memory-to-processor bottlenecks have become a chief obstacle in boosting computer performance. Recent efforts to place DRAM onto chip packages Read more…

SKA Astronomy Project Gets Boost with Hybrid Memory Cube

June 14, 2017

An ambitious astronomy effort designed to peer back to the origins of the universe and map the formation of galaxies is underpinned by an emerging memory technology that seeks to move computing resources closer to huge astronomy data sets. Read more…

By George Leopold

HPE’s Memory-centric The Machine Coming into View, Opens ARMs to 3rd-party Developers

May 16, 2017

Announced three years ago, HPE’s The Machine is said to be the largest R&D program in the venerable company’s history, one that could be progressing tow Read more…

By Doug Black

Intel Ships Drives Based on 3D XPoint Non-volatile Memory

March 20, 2017

Intel Corp. has begun shipping new storage drives based on its 3D XPoint non-volatile memory technology as it targets data-driven workloads. Intel’s new Optane solid-state drives, designated P4800X, seek to combine the attributes of memory and storage in the same device. Read more…

By George Leopold

Research Team Propels In-Memory Arithmetic

January 5, 2017

A team of top international scientists is working to create memory chips that double as processing elements, a breakthrough that could pave the way for novel co Read more…

By Tiffany Trader

STREAM Benchmark Author McCalpin Traces System Balance Trends

November 7, 2016

When Dr. John D. McCalpin introduced the STREAM benchmark in 1991, it had already become become clear that peak arithmetic rate was not an adequate measure of HPC system performance for many applications. Since then, CPU performance has continued to outpace memory performance measures, leading to the processor-memory speed gap, known as the memory wall. In an invited talk at SC16, McCalpin will trace the history of changing “balances” between computation, memory latency, and memory bandwidth and will explore the impact to the next-generation of HPC systems. Read more…

By Tiffany Trader

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Full & Complete coverage of SC17

Keynote Reviews, Analysts Write Ups, Booth Vidoes, Student Competition, Awards and so much

Did you miss out on Supercomputing 2017? Did you attend, but were stuck in meetings the whole time without an opportunity to walk the show floor and see what new announcements were being made? HPCwire's got you covered, we visited some of the hottest booths in the exhibit hall and spoke with their top executives to get the scoop on the latest solutions, partnerships, and product announcements.

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Avoiding the Storage Silo Trap; Best Practices for Data Storage in Scientific Research

From mismatches between compute and storage capabilities to colossal data volumes, data storage presents a number of challenges for scientific research. And as silos pop up and challenges expand, the pace of research often suffers.

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Creating a Modular, Building-Block Architecture for Life Science Workflows

As genomic data becomes ubiquitous, infrastructure bottlenecks for life sciences organizations are narrowing. But speedy analysis and real-time decision making don't have to remain out of reach: modern end-to-end systems are emerging as flexible solutions for a competitive edge.

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