Tag: multicore

On-Chip Device Accelerates Core-to-Core Communication

Sep 13, 2016 |

A team of engineers from North Carolina State University and Intel have joined forces to address on-chip communications bottlenecks that hamper performance scaling for workloads that share data frequently. Their paper, “CAF: Core to Core Communication Acceleration Framework,” describes a novel core-to-core Communication Acceleration Framework (CAF). The technique could provide relief for many HPC applications Read more…

Report Addresses the Perils of Dark Silicon

Jul 21, 2016 |

Dark silicon refers to the processing potential that’s lost when thermal constraints disallow full CPU utilization. The gap between transistor scaling and voltage scaling combined with tighter integration of components (multicore, SoCs) has power density ramifications that are of particular concern for embedded computing, but high-performance computing faces similar “dark power” challenges. Bringing attention to this issue and exploring common solutions was the goal of the Dagstuhl Seminar 16052, “Dark Silicon: From Embedded to HPC Systems.”

MIT’s Multicore Swarm Architecture Advances Ordered Parallelism

Jul 21, 2016 |

A relatively new architecture explicitly designed for parallelism – Swarm – based on work at MIT has shown promise for substantially speeding up classes of applications (graphs, for example) and decreasing the programming burden to achieve parallelism. The work, recounted in a recent paper, Unlocking Ordered Parallelism with the Swarm Architecture, bucks conventional wisdom and Read more…

James Reinders: Parallelism Has Crossed a Threshold

Feb 4, 2016 |

Is the parallel everything era here? What happens when you can assume parallel cores? In the second half of our in-depth interview, Intel’s James Reinders discusses the eclipsing of single-core machines by their multi- and manycore counterparts and the ramifications of the democratization of parallel computing, remarking “we don’t need to worry about single-core processors anymore Read more…

Processor Diversity on the Rise, Reports Intersect360

Nov 12, 2015 |

Intel x86 processors continue to dominate HPC servers while the number of cores per processor also keeps rising, perhaps no surprises there. Also somewhat anticipated, the amount of memory per core, per processor, and per node is rising. These are the top line results of Intersect360 Research’s latest HPC sites survey on processor use. A Read more…

OpenACC Reviews Latest Developments and Future Plans

Nov 11, 2015 |

This week during the lead up to SC15 the OpenACC standards group announced several new developments including the release and ratification of the 2.5 version of the OpenACC API specification, member support for multiple new OpenACC targets, and other progress with the standard. “The 2.5 specification addresses an essential challenge of profiling code where a Read more…

Argonne’s Paul Messina on Training for Extreme-Scale

Mar 12, 2015 |

Paul Messina, director of science for the Argonne Leadership Computing Facility (ALCF), discusses the primary objectives, curriculum and importance of the Argonne Training Program on Extreme-Scale Computing (ATPESC), now in its third year. HPCwire: Can you give us an overview of the Argonne Training Program on Extreme-Scale Computing (ATPESC)? Paul Messina: Absolutely, Tiffany. The ATPESC Read more…

A Comparison of Heterogeneous and Manycore Programming Models

Mar 2, 2015 |

The high performance computing (HPC) community is heading toward the era of exascale machines, expected to exhibit an unprecedented level of complexity and size. The community agrees that the biggest challenges to future application performance lie with efficient node-level execution that can use all the resources in the node. These nodes might be comprised of Read more…

BSC, Intel Extend Exascale Research Effort

Feb 17, 2015 |

Intel’s efforts to advance exascale computing concepts received a boost with the extension of the company’s research collaboration with the Barcelona Supercomputing Center (BSC) – one of four Intel exascale labs in Europe. Begun in 2011 and now extended to September 2017, the Intel-BSC work focuses on scalability issues with parallel applications. “[A major goal] Read more…

Scalable Priority Queue Minimizes Contention

Feb 2, 2015 |

The multicore era has been in full-swing for a decade now, yet exploiting all that parallel goodness remains a prominent challenge. Ideally, compute efficiency would scale linearly with increased cores, but that’s not always the case. As core counts are only set to proliferate across the computing spectrum, it’s an issue that merits serious attention. Researchers from Read more…