What could you do with a 48-core smart phone? If Intel has its way, you won’t have to wait long to find out.
<img style=”float: left;” src=”http://media2.hpcwire.com/hpcwire/exludus_logo.jpg” alt=”” width=”139″ height=”32″ />The advent of multicore servers presents something of a challenge for application virtualization. This is especially true in the realm of high performance computing, an environment that has never been particularly friendly to virtualization. To overcome these hurdles, eXludus Technologies has introduced “micro-virtualization,” a technology that brings virtualization down to the level of the core, and does so with minimal overhead.
As processor core counts rise, MIT research suggests on-chip networks will be needed.
MIT’s Hornet simulator takes the sting out of manycore design.
In a recent article in the HPC Source magazine, Wolfgang Gentzsch discusses the good, the bad, and the ugly of multicore processors.
A new language could improve the quality of parallel code and automate some of the trickiest elements of multicore programming.
The Weekly Top Five features the five biggest HPC stories of the week, condensed for your reading pleasure. This week, we cover the NC State effort to overcome the memory limitations of multicore chips; the sale of the first-ever commercial quantum computing system; Cray’s first GPU-accelerated machine; speedier machine learning algorithms; and the connection between shrinking budgets and increased reliance on modeling and simulation.
Researchers mitigate multicore challenges to refine current geological simulation capabilities.
The Weekly Top Five features the five biggest HPC stories of the week, condensed for your reading pleasure. This week, we cover Bull’s third petascale computing contract; IBM’s new POWER7 servers, the first hybrid spintronics computer chips, Bull and Whamcloud’s beefed-up Lustre support; and Tilera’s latest manycore development tools.