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ChapelCon 24 is this Week; Still Time to Join In
June 4, 2024
The Chapel team at HPE is very excited to announce ChapelCon '24! ChapelCon is a conference about applications written in the Chapel parallel programming lang Read more…
Solving Heterogeneous Programming Challenges with SYCL
December 8, 2021
In the first of a series of guest posts on heterogenous computing, James Reinders, who returned to Intel last year after a short “retirement,” considers how SYCL will contribute to a heterogeneous future for C++. Reinders digs into SYCL from multiple angles... Read more…
15 Slides on Programming Aurora and Exascale Systems
May 7, 2020
Sometime in 2021, Aurora, the first planned U.S. exascale system, is scheduled to be fired up at Argonne National Laboratory. Cray (now HPE) and Intel are the k Read more…
DARPA Looks to Propel Parallelism
September 4, 2019
As Moore’s law runs out of steam, new programming approaches are being pursued with the goal of greater hardware performance with less coding. The Defense Advanced Projects Research Agency is launching a new programming effort aimed at leveraging the benefits of massive distributed parallelism with less sweat. Read more…
An Overview of ‘OpenACC for Programmers’ from the Book’s Editors
June 20, 2018
In an era of multicore processors coupled with manycore accelerators in all kinds of devices from smartphones all the way to supercomputers, it is important to Read more…
GTC18 Research Highlight: Programming a Hybrid CPU-GPU Cluster Using Unicorn
March 27, 2018
Unicorn is a parallel programming framework that provides a simple way to program multi-node clusters with CPUs and GPUs, and potentially other compute devices. Read more…
Optimizing Codes for Heterogeneous HPC Clusters Using OpenACC
July 3, 2017
Looking at the Top500 and Green500 ranks, one clearly realizes that most HPC systems are heterogeneous architecture using COTS (Commercial Off-The-Shelf) hardware, combining traditional multi-core CPUs with massively parallel accelerators, such as GPUs and MICs. With processor frequencies now hitting a solid wall, the only truly open avenue for riding today the Moore’s law is increasing hardware parallelism in several different ways: more computing nodes, more processors in each node, more cores within each processor, and longer vector instructions in each core. Read more…
LOLCODE: I Can Has Supercomputer?
April 5, 2017
What programming model refers to threads as friends and uses types like NUMBR (integer), NUMBAR (floating point), YARN (string), and TROOF (Boolean)? That would Read more…
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