SiCortex Marches to A Different Drummer
Last month at SC06, SiCortex, Inc. introduced its family of ultra low power high performance Linux systems, based on MIPS processor technology. Selected as one of five “HPC Companies to Watch in 2007″ by HPCwire, SiCortex has developed a unique system architecture that it says represents a “sea change in cluster computing.”
In this Q&A, the company's co-founders, John Mucci (CEO) and Jud Leonard (CTO), talk about the novel design of the SiCortex systems, how the design overcomes the limitations of conventional clusters, and how their offerings will fit into the HPC market.
HPCwire: How do you view the HPC landscape today?
Mucci: It is a very exciting time in high performance computing. At the very highest end, DARPA is accelerating the pace at which the very biggest systems are able to do new science. In the volume part of the market, clusters have spawned a stable Linux/MPI software model that means that existing codes are portable in ways they never were before.
The number of organizations that are actually benefitting from HPC techniques of simulation is quite small compared to the number that could be benefitting. Proctor & Gamble has become a poster child for what happens when a previously HPC-phobic organization makes the transition. SiCortex started by asking:
“Given that the need for HPC is ubiquitous, why isn't HPC itself ubiquitous?”
As the President's Information Technology Advisory Committee has pointed out, many of the obstacles are operational: “the most serious technical problems in computational science lie in software, usability, and trained personnel.” Mainstream users need a powerful but stable, compatible, and cost-effective solution. It needs to be powerful because these users cannot get bogged down in speed-hacking. It needs to be stable so they do not need a staff of sys admins just to keep the system up. It needs to be cost-effective to fit in existing budgets.
But most of all it needs to be software compatible so existing software just compiles, links and runs.
Just how powerful, stable, and cost-effective does it need to be? SiCortex research showed that ubiquity will require a teraflops or so of sustained applications performance, a single-vendor solution with a MTBF of a month or more, and a price — purchase and three-year operation — below $2 million. It was clear that conventional cluster thinking was standing in the way of these goals. SiCortex needed to take a very different path.
HCPwire: There are a lot of HPC cluster solutions already out there. What are the main problems with the existing solutions and how did SiCortex go about addressing them?
Mucci: First-generation clusters have unacceptably low sustained applications performance and unacceptably high cost of operation. A key SiCortex insight is that heat (i.e. power) plays a major role in both of these problems. Get the heat out and a whole virtuous circle of benefits unfolds.
For example, first generation clusters, with their hundred-plus watt processor chips, have to be spread out across multiple cabinets in order to dissipate all the heat. As a result they have to use cable interconnects that are either very expensive (reducing the budget for processors by a third or more) or very slow (destroying sustained performance.)
Heat is also the enemy of reliability, driving up the cost of operating the system and the number of jobs lost to hardware failure. And at a dollar a watt a year, power is now 50 to 70 percent of hardware cost over three years.
The second key issue in sustained performance — unbalanced processor and memory performance– has also been addressed by SiCortex, as described below.
HPCwire: What are the main technological innovations encompassed in the SiCortex systems?
Leonard: SiCortex brings two fundamental innovations to the marketplace. The first is to reduce *all* of the computational elements of a cluster node — arithmetic, communications, error correction, and cache/memory management — onto a single piece of silicon. The second key innovation is to reduce the power consumption of those nodes to 10 watts — 15 watts with memory — so that thousands of processors can be packed onto a single reliable backplane.
The SiCortex clean-sheet-of-silicon approach in turn embeds two key innovations: the aggressive use of third party IP and the aggressive balancing of processor and memory performance. We have integrated circuitry designed and licensed by six different companies, each with unique expertise, thereby reducing our own design task by an order of magnitude. This ability to exploit and manage the new silicon IP ecosystem will be critical to *all* systems companies in the future, just as the ability to integrate at the box level was key to Dell's success in the 90s.
Silicon-level integration is also critical to our ability to match processor and memory performance. By designing our own cache and dual DDR-2 memory controllers, and matching them to a gaggle of one gigaflop processing cores, we are able to achieve, and utilize, more than ten terabytes of sustained memory bandwidth.
The SiCortex heat reduction innovations are what, in turn, enable a return to traditional single-cabinet backplane packaging. The SiCortex cabinet breathes easily, corrects its own errors on a routine basis, installs most anywhere, and runs existing Linux/MPI codes. It offers the most accessible teraflops on the planet; exactly what is needed to spread the benefits of HPC.
HPCwire: In some sense, your approach appears to resemble the IBM Blue Gene one, where a relatively low-power PowerPC is used as the basis for a highly dense, scalable, low power supercomputer. How would you compare the SiCortex approach with that of the IBM Blue Gene?
Mucci: SiCortex respects the way that IBM has brought a recognition of heat and power issues to the very high end of the HPC marketplace. They have not, however, carried it far enough to unlock the virtuous circle of architectural benefits that SiCortex is now enjoying. As a result, they are still spending a lot of design effort dealing with power and heat that should not be there in the first place.
SiCortex also has a different performance target. Blue Gene is focused on petaflops for the few; SiCortex is focused on teraflops for the many. By focusing on performance at any cost, IBM is joining those who are flirting with FPGAs, Cell chips, graphics processors, and other non-standard techniques. IBM itself has noted that “Blue Gene is a somewhat exotic machine.” Thus their successes to date, and there have been impressive ones, have been won at the expense of heroic porting and recoding efforts. SiCortex is committed to the baseline Linux/MPI standard. Codes will move onto and off of our machine very gracefully.
HPCwire: One of the big criticisms of commodity cluster systems is the large difference between peak performance and sustained performance on real applications? Do you have a sense of how well the SiCortex machines will perform with actual HPC workloads?
Leonard: As John mentioned, SiCortex expects the HPC market to really open up when a sustained teraflops or so of performance is routinely and inexpensively available. Our processor-memory architecture, our micro-programmable communications “DMA engine,” and our Kautz graph backplane interconnect with its half-terabyte of bisection bandwidth are all aimed explicitly at this target.
Our simulations give us confidence that we have a dramatically better solution. We know, however, that only a full-systems test will convince customers. So we are being very conservative until we have real measurements.
HPCwire: Your MIPS-based systems go against the trend for commodity x86-based HPC machines, with its enormous software ecosystem. How will your solution compete against the software momentum behind x86?
Mucci: As you suggest, an instruction set architecture needs to be supported by a much wider ecosystem than the HPC market itself can provide. x86 and Power are two such HPC architectures that piggy-back on the commercial pc market. MIPS has an equally unstoppable ecosystem, piggy-backing on the enormous embedded systems market. More than 250 million MIPS cores will ship this year alone. And in the HPC marketplace, one ecosystem dominates: the Linux/MPI ecosystem which we are riding.
The biology analogy gives further insight into why MIPS momentum is growing. Biologists speak of “exaptations” in contrast to “adaptations.” When the environment changes, all successful organisms start a process of adaptation. Now that HPC has hit a power and heat wall, for example, we can see the x86 and Power architectures working to adapt. The winners, however, are invariably those organisms that happen to already have the right stuff for some other reason. In biology-speak, they have an “exaptation”. Because it has been living in the very power-constrained environment of embedded computing, the MIPS instruction set already has the sub-watt power gene that is needed to thrive in HPC going forward. x86 and Power instruction sets may evolve down from hundreds of watts to dozens of watts, but they will never get to milliwatts. And dozens of watts is just too much to spend on a system's arithmetic.
HPCwire: Presumably buyers will pay some premium for your customized approach versus a x86 commodity cluster solution. What are the economic incentives for choosing SiCortex?
Mucci: SiCortex does not expect anyone to pay a premium. By integrating at the system level, we have taken out whole layers of cost. Visitors to our [SC06] booth recognized that fact immediately when they saw our board layout.
We will be less expensive both in purchase price and in operating cost.
HPCwire: Do you have any plans to scale up or scale down the SiCortex solutions to larger or smaller systems, respectively?
Mucci: We do.