May 28, 2014

Intel Gives Code Modernization Fresh Push

Nicole Hemsoth

In the conversations leading up to exascale, one of the most frequently cited pain points is the need for massive software optimization and code modernization. But this isn’t just a relevant topic for the largest system operators at the supercomputing pinnacle.

According to Intel’s General Manager of the Technical Computing Group, Charlie Wuischpard, there are many centers, both academic and commercial, that are leaving incredible performance gains on the table because of a lack of appropriate investment in their codes, many of which aren’t taking advantage of the number of cores, vectorization, and other capabilities that sit idle in modern manycore and multicore architectures.

While the need for disruptive measures to wake application owners up to the possibilities of exploiting these capabilities isn’t news to most, there are a couple of barriers that chipmaker hopes to break with an expansion of their Intel Parallel Computing Center program, which launched in October of last year and due to demand, has been expanded with a new call for proposals. While the support and guidance, financial and otherwise, these centers receive from the company are not modest, the real problem is higher level than simply digging into aging code. As with so many other challenges in commercial and research HPC, it’s a matter of funding.

According to Bob Burroughs, Director of Intel’s Technical Computing Ecosystem Enablement, the standard for institutions and companies they work with is to show performance and ROI gains based on hardware-driven generation jumps, which by default offer greater performance. But as many are quickly becoming aware, that mode of boosting systems hits a brick wall when the compute far outpaces the code. In other words, the historical vision Intel and others have pitched has spoken directly to the hardware and infrastructure decision makers. But without direct investment in the software and application side of the house as a priority, adding more, faster cores will fall continuously flat. So the issue becomes an institutional one—both in research and commercial HPC. It’s a new flow of investment driven to internal groups that generally don’t touch much of the hardware investment decision-making.

Wuischpard and Burroughs said they were bowled over by the interest in their Parallel Computing Center Program—not simply because it showed there is definite interest from a wide community, but more important, because it shows just how little external investment there seems to be in this most critical area. The hardware ROI discussions are so often center stage at institutions with too little recognition of how the real return on any such investment is hinged directly to software refinement and modernization.

The same is true at national labs and government agencies, says Burroughs. It’s far easier for centers to push through big funding for projects that pitch the system-level value, but too often, the software optimization and modernization piece, which incidentally is the most critical component going forward, is not given the funding and effort required to fully maximize the hardware investments. What’s needed, says Burroughs, is a steady, sustained emphasis on modernizing codes to take advantage of the architectures of the future, but this isn’t something that his company alone can spearhead.

“We can’t fund it all,” he says, pointing to his hope that their centers can show real-world gains as a result of these optimizations, thus validating the case for future investments.

Wuishpard reminds that this need for optimization and modernization isn’t just an issue for the large labs and academic centers to consider in a future roadmap sense. There are 10x-100x performance gains left on the table for a large swath of users who simply hopped from generation to generation with a single-core mindset and no real incentive to make the difficult software investments required. He points to a few innovative places where current and future work is being meshed to extract performance gains now through code modernization with an eye on how the systems of the future will further maximize these investments.

One example he pointed to was the NERSC-8 system, which requires that their application developers start digging into the code to exploit the cores, threads and other capabilities of the selected Knights Landing architecture before the system is ever delivered. He referred also to other representative examples that highlight the current progress of code optimization for coming architectures via the GROMACS work at the University of Tennessee—a project that effectively rendered one of the most widely-used molecular dynamics codes across life sciences future-ready.

Burroughs and Wuishpard shared that Intel plans on highlighting specific examples on real-world codes over the course of the next year to drive home the value of their investment in software optimization. However, with a future defined by manycore and multicore architectures, even without Intel’s investment this should be a priority item for funding agencies, infrastructure decision makers and most important—the code folks themselves. Without their direct involvement, the hardware gains are minimal. We’ll share these stories over the coming about how this critical software work translates into direct gain.