HPCwire: Convey Computer Launches Hybrid-Core Computer

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November 17, 2008

Convey Computer Launches Hybrid-Core Computer

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AUSTIN, Texas, Nov. 17 -- A revolutionary solution to the high-performance computing (HPC) industry's expensive power, performance and programmability barriers launched today at SC08 in the form of the world's first hybrid-core computer from new company Convey Computer Corporation.

Created by the executive team that built Convex Computer, Convey fills a new market space called hybrid-core computing. Simply put, hybrid-core computing marries the low cost and simple programming model of a commodity system with the performance of customized hardware architecture.

The Convey HC-1 integrates advanced, patent-pending computer architecture and compiler technology with commercial, off-the-shelf hardware - namely an Intel Xeon processor and Xilinx Field Programmable Gate Arrays. The HC-1 features a Convey-engineered coprocessor with its own high-bandwidth, virtual memory addressed, cache-coherent memory subsystem in a scalable 2U chassis. Moreover, an ANSI standard development environment gives programmers 100 percent productivity and portability - an attribute unique to Convey.

The HC-1 transforms HPC in three main ways. It: 1) breaks through the current power/performance wall to significantly increase performance for certain compute and memory bandwidth intensive applications within bioinformatics, financial analytics, seismic, and certain other application areas; 2) is easy for programmers to use because it provides full support of an ANSI standard C, C++ and Fortran development environment. Such support eliminates programming model changes and enables Convey's system to accelerate existing code ("dusty decks"); and 3) significantly reduces support, power and facility costs for companies, yet it makes integration into current HPC environments simple and inexpensive. A prototype of the HC-1 will be on display at SC08 Booth 1753.

"With our energy-efficient Intel Xeon processors as the backbone of high-performance computing, we are working closely with Convey to enable an innovative computing system that significantly enhances performance for certain applications," said Pat Gelsinger, senior vice president and general manager of Intel's Digital Enterprise Group. "Convey's system is unique in that it does not require programmers to instrument their code but, instead, provides an open-standard programming model that does not use proprietary mechanisms that have historically limited adoption of heterogeneous solutions."

Bruce Toal, CEO of Convey Computer Corporation, said Convey was formed to "build a foundation for innovation that eliminates the programming and usability barriers of asymmetric computing that are reminiscent of the days of array processors. The ability to accelerate existing applications without special language extensions and without explicit data movement enables a new era of high-performance, hybrid-core computing."

Early customers of the technology agree. The University of California, San Diego (UCSD) has placed the first order under its Project GreenLight power and energy efficiency initiative, and estimates substantial performance gains and cost savings.

"The HC-1 is a remarkably ingenious and innovative HPC architecture, which combines the best of both worlds of general purpose multi-core and special-purpose Field Programmable Gate Arrays," said Dr. Larry Smarr, director of the California Institute for Telecommunications and Information Technology (Calit2) and a professor of Computer Science and Engineering in UCSD's Jacobs School of Engineering. "Once again, Steve Wallach has introduced a new class into HPC architectures."

Wallach, co-founder of Convey Computer, is the 2008 winner of the Seymour Cray Computer Science and Engineering Award.

About the Convey HC-1

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