SEATTLE, August 9, 2019 — Global supercomputer leader Cray Inc  announced that its Senior Vice President and Chief Technology Officer Dr. Steve Scott will be a keynote speaker at the IEEE Hot Interconnects 2019 conference. The IEEE Hot Interconnects Conference is being held on August 14 – 16 in Santa Clara, California, and is the premier international forum for researchers and developers of state-of-the-art hardware and software architectures and implementations for interconnection networks of all scales. The event gathers industry and academia leaders to discuss the latest in data-center networking and supercomputing communities.

Cray will present on Rosetta, the switch at the core of Cray’s next generation Slingshot interconnect that has been announced as part of the first two planned U.S. exascale supercomputers Aurora and Frontier. Rosetta is comprised of 64 ports, each providing 200 Gbps/direction over four lanes of 56G PAM4 SerDes. Rosetta enhances Ethernet with leading-edge HPC network functionality. It can connect to standard Ethernet endpoints and switches, but also implements an optimized “HPC Ethernet” protocol that provides several performance and resilience functions, including streamlined headers, credit-based flow control, low-latency FEC, link-level retry to tolerate transient failures, and lane-degrade capability to tolerate hard failures. Rosetta implements highly flexible QoS traffic classes, an adaptive routing mechanism capable of over 90% sustained network utilization at scale, a rich suite of synchronization mechanisms, and, most importantly, a novel congestion control mechanism suitable for dynamic HPC and datacenter workloads. Rosetta’s congestion management provides strong performance isolation between workloads, and low, uniform packet latency, making it ideally suited for emerging heterogeneous, data-centric workloads.

Dr. Steve Scott is one of the few experts in the US who has architected several generations of supercomputing interconnects which have powered critical work in the world for decades. He serves as senior vice president and CTO at Cray, responsible for guiding the long-term technical direction of the company’s supercomputing, storage and analytics products. Dr. Scott rejoined Cray in 2014 after serving as principal engineer in the Platforms group at Google and before that as the senior vice president and CTO for NVIDIA’s Tesla business unit. Dr. Scott first joined Cray in 1992, after earning his Ph.D. in computer architecture and BSEE in computer engineering from the University of Wisconsin-Madison. Dr. Scott is a noted expert in high performance computer architecture and holds 41 U.S. patents in the areas of interconnection networks, cache coherence, synchronization mechanisms and scalable parallel architectures. He received the 2005 ACM Maurice Wilkes Award and the 2005 IEEE Seymour Cray Computer Engineering Award, and is a Fellow of IEEE and ACM. Dr. Scott was named to HPCwire’s “People to Watch in High Performance Computing” in 2012 and 2005.

The event will take place on Friday, August 16, 2019 at 9:00 a.m., IEEE Hot Interconnects Conference at Intel’s corporate headquarters in Santa Clara, California.

About Cray Inc.
Cray Inc. combines computation and creativity so visionaries can keep asking questions that challenge the limits of possibility. Drawing on more than 45 years of experience, Cray develops the world’s most advanced supercomputers, pushing the boundaries of performance, efficiency and scalability. Cray continues to innovate today at the convergence of data and discovery, offering a comprehensive portfolio of supercomputers, high-performance storage, data analytics and artificial intelligence solutions.  Go to www.cray.com for more information.

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Source: Cray Inc.