XConn to Showcase New CXL 2.0 Interconnect Solution at CXL DevCon 2024

April 30, 2024

SANTA CLARA, Calif., April 30, 2024 — XConn Technologies (XConn) today announced that it will be featuring the industry’s first and only CXL 2.0 interconnect solution available in early production samples during CXL DevCon 2024, April 30 – May 1, 2024 in Santa Clara, Calif.

Designed to accelerate the system design process to power the future of AI-enabled computing, the XConn “Apollo” CXL 2.0 switch has become the industry standard solution to support environments that want to take advantage of a CXL Memory Pool to remove traditional memory barriers and revolutionize memory architecture. It is the interconnect at the core of systems and solutions developed across the CXL ecosystem including Samsung, Montage and Micron and many more.

“XConn is proud to be at the center of the CXL movement, delivering the interconnect technology necessary to make the adoption of CXL a reality,” said Gerry Fan, CEO, XConn. “Now, as we roll out our early production samples, XConn is demonstrating the power of CXL in practice so that system manufacturers across the industry can seamlessly integrate CXL into their solutions for AI workloads.”

“Samsung has developed an integrated solution (CMM-B) to deliver the power of CXL to support the demanding memory requirements of next-generation applications with XConn CXL switch SoC,” said Dr. Sungwook Ryu, Head of Samsung Semiconductor Memory Solutions Lab. “It further underscores our belief in the CXL specification for higher performance computing with reduced software stack complexity and lower overall system cost.”

“XConn’s groundbreaking work in CXL interconnect technology is crucial for propelling computing capabilities, especially in the realm of data pooling and aggregation,” highlighted Stephen Tai, President of Montage Technology. “Aligned with the entire CXL community, we are steadfast in our commitment to advancing CXL’s adoption as the pivotal technology driving an AI-centric future.”

“With the increasing use and evolution of AI, the need for memory-centric data infrastructure becomes ever more vital,” said Charles Fan, CEO and co-founder, MemVerge. “CXL technology is transforming the industry with memory fabric for the future of computing. The combination of Memory Machine X and the innovative XConn Apllo switch makes scalable memory capacity a reality for tomorrow’s generation of AI applications.”

The XConn Apollo switch is innovative in its design, offering system developers the opportunity to future-proof devices to capitalize on the breakthrough performance of new CXL interconnect technology with the industry’s first CXL 2.0 switch, while also supporting PCIe 5.0 standards. Both PCIe and CXL can now be supported in a single design. With 2,048 GB/s of total bandwidth and 256 lanes, the chip offers unprecedented flexibility for system designers that want to capitalize on JBOG (Just-a-Bunch-Of-GPUs) and JBOA (Just-a-Bunch-Of-Accelerators) processing configurations.

Available now in early production samples, XConn Apollo delivers full support for CXL 2.0, is backwards compatible with CXL 1.1 and supports PCIe Gen 5 in hybrid mode. For customer samples and/or Apollo reference boards, contact XConn at xconn-tech.com.

About XConn Technologies

XConn Technologies Holdings, Inc. (XConn) is the innovation leader in next-generation interconnect technology for high-performance computing and AI applications. The company is the industry’s first to deliver a hybrid switch supporting both CXL 2.0 and PCIe Gen5 on a single chip. Privately funded, XConn is setting the benchmark for data center interconnect with scalability, flexibility and performance.


Source: XConn

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