OpenACC Expands Community, Reveals Roadmap Details

By Tiffany Trader

November 7, 2016

In advance of the SC16 expo in Salt Lake City next week, the OpenACC standards group today welcomed newest member NSSC-Wuxi and highlighted a number of important developments for the directives-based programming standard. Ahead of the announcement, HPCwire spoke with Michael Wolfe, technical director of OpenACC, and Duncan Poole, OpenACC president and director of platform alliances for accelerated computing at Nvidia.

OpenACC (Open Accelerators) was developed by Cray, CAPS, Nvidia and PGI circa 2011. The standard was designed to simplify parallel programming of heterogenous CPU-GPU machines and has since added support for additional multicore/manycore platforms, while maintaining code portability.

OpenACC’s newest member is the National Supercomputing Center (NSCC) in Wuxi, China, home to the TaihuLight Sunway system, which made its grand TOP500 entrance at ISC 2016, pushing the LINPACK record to 93 petaflops. NSCC-Wuxi runs a custom version of OpenACC developed for the Sunway system’s 260-core Chinese-made processor.

“The OpenACC paradigm was chosen for its better fit to our many-core processor, with a few extensions to better support the efficient utilization of the new hardware features such as the Scratch Pad Memory for each core and DMA instructions,” said Dr. Haohuan Fu, deputy director of the National Supercomputing Center in Wuxi and associate professor Center for Earth System Science at Tsinghua University, in a prepared statement.

TaihuLight’s Sunway manycore processors are composed of four core groups; each core group has one management processing element (MPE) and 64 compute processing elements (CPEs) for a total of 260 cores per CPU. Says Wolfe, who is also a compiler engineer with PGI (Nvidia), “Essentially, there’s a control processor that runs the main application and offloads the parallel region to the compute elements. When they’re using OpenMP the offload model offloads the parallel part to the compute elements and the master thread goes on with the scalar part of the code. NSCC-Wuxi wanted that master thread to participate in the parallel work and thought that would be more natural with the OpenACC model.” Wolfe added that OpenMP also has a lot of synchronization constructs that are challenging to implement on the manycore architecture.

OpenACC was used to parallelize and tune one of three NSCC-Wuxi codes on the short-list to receive the prestigious Gordon Bell prize at SC16. CAM-SE is a “10 million core scalable fully-implicit solver for nonhydrostatic atmospheric dynamics” that contains 530,000 lines of code.

A number of flagship HPC codes are also using OpenACC, notably Gaussian, widely-used in quantum chemistry, and ANSYS Fluent, the popular commercial CFD software. “We build and support Fluent on a wide variety of parallel computing systems, and we need to be able to write a single version of our source code that runs efficiently on all of those systems,” said Sunil Sathe, Fluent lead software developer. “With OpenACC, we were able to quickly enable a key solver for GPU acceleration while keeping the same code base for CPU execution. The OpenACC performance was excellent on NVIDIA GPUs and very competitive on CPUs.”

OpenACC is also being used by five of the thirteen application-readiness codes used to qualify the 200-petaflops Summit supercomputer that is going in at Oak Ridge Labs. “This shouldn’t be a surprise because the Oak Ridge Leadership Computing Facility is a big OpenACC user today,” said Duncan Poole, president of OpenACC and Nvidia executive.openacc-2015-2017

OpenACC also has production support for OpenPower, both multicore OpenPOWER and CPU + GPU implementations. Poole said that support for manycore Xeon CPUs (i.e., the Knight Landing Phi and follow-ons) is on track for 2017. The latter will be key for the Summit supercomputer, which will have some 3,400 nodes comprising multiple Power9 CPUs and multiple NVIDIA Volta GPUs, connected with Nvidia’s second-generation NVLink technology. For more information about how OpenACC is supporting the OpenPower architecture, see our June coverage.

The OpenACC roadmap

OpenACC also previewed features that will be added to its next release (2.6), being targeted for the middle of next year. One of the key features that’s been requested by users for the last couple years is “deep copy.” When we talked with Wolfe last year at this time, he said deep copy was being targeted for the 3.0 release, but now the standards body is planning a sort of interim step, to enable OpenACC to support a manual deep copy.

Wolfe explains, “This is where you have deeply nested data structures with pointers to other data structures that have pointers to other data structures and want to move the whole structure over to the device, which is a different memory space with different addresses and still keep the pointers valid.

“We’ve been struggling with a way to define this in manner that is seamless to use and still performant. We arrived at the decision to make a small change to the specification so that users can do a manual deep copy.”

Manual deep copy gives users the behavior that they want although it’s not as conventient as they would like, Wolfe commented. The standards group is looking for someone to do an implementation of the true deep copy before it is hardened into the specification. Wolfe wouldn’t speculate on a timeline: “If we can get a prototype implementation, our hope is that that may shake out potential problems, but we cannot predict how many of those there might me.”

Additional features planned for OpenACC include Device Query Routines, Error Callback Routine, Polymorphic Routine Compilation, Serial Compute Construct, and Array Reductions.

These are all highly requested by users, the actual people working on programs, said Wolfe.

openacc-2-6-proposed-functionality-slide

OpenACC doesn’t have a calendar-based release cadence. Instead, they collect requests and push out a new release when they have a critical mass to constitute a new release.

“What we want to work on is the big items, things like true deep copy or a seamless way to spread parallel regions across multiple devices, or load balancing across the GPU and the CPU and how do you manage that. Those are big items; those are what users really want,” said Wolfe.

He added, “Last summer I was visiting CSCS in Lugano, Switzerland, and each node of the cluster they host for the weather forecasting service MateoSwiss has four K80s, so eight GPUs per node. Well how do you manage that? Is it easy or is there a way to make it even easier, that’s a big challenge, and we’re ready to take it on.”

Community engagement and education

Via partnerships with Oak Ridge National Laboratory and other member orgs, OpenACC continues to offer hackathons around the world. More info is at http://www.openacc.org/hackathons. Oak Ridge and OpenACC will also be conducting a series of free two and half day workshops starting next year. These are designed to introduce developers to the framework and are a new addition to OpenACC’s training and education program.

SC16 activities include:

OpenACC Birds of a Feather, Wed. Nov. 16th 5:30–7:00PM in room 155-C. Discussion will include such topics as “Should OpenACC and OpenMP ever merge”.

Free “Parallel Programming with OpenACC” books will be signed by author Rob Farber Monday, November 14 from 7:00 to 9:00 pm in the OpenACC booth #634.

Bringing About HPC Open-Standards World Peace, Nov. 16th, 10:30 am 255-BC

Members will be available for questions in the OpenACC booth #634.

Visit http://www.openacc.org/sc16 for a list of all OpenACC member activities.

Subscribe to HPCwire's Weekly Update!

Be the most informed person in the room! Stay ahead of the tech trends with industy updates delivered to you every week!

Red Hat’s Disruption of CentOS Unleashes Storm of Dissent

January 22, 2021

Five weeks after angering much of the CentOS Linux developer community by unveiling controversial changes to the no-cost CentOS operating system, Red Hat has unveiled alternatives for affected users that give them severa Read more…

By Todd R. Weiss

China Unveils First 7nm Chip: Big Island

January 22, 2021

Shanghai Tianshu Zhaoxin Semiconductor Co. is claiming China’s first 7-nanometer chip, described as a leading-edge, general-purpose cloud computing chip based on a proprietary GPU architecture. Dubbed “Big Island Read more…

By George Leopold

HiPEAC Keynote: In-Memory Computing Steps Closer to Practical Reality

January 21, 2021

Pursuit of in-memory computing has long been an active area with recent progress showing promise. Just how in-memory computing works, how close it is to practical application, and what are some of the key opportunities a Read more…

By John Russell

HiPEAC’s Vision for a New Cyber Era, a ‘Continuum of Computing’

January 21, 2021

Earlier this week (Jan. 19), HiPEAC — the European Network on High Performance and Embedded Architecture and Compilation — published the 8th edition of the HiPEAC Vision, detailing an increasingly interconnected computing landscape where complex tasks are carried out across multiple... Read more…

By Tiffany Trader

Supercomputers Assist Hunt for Mysterious Axion Particle

January 21, 2021

In the 1970s, scientists theorized the existence of axions: particles born in the hearts of stars that, when exposed to a magnetic field, become light particles, and which may even comprise dark matter. To date, however, Read more…

By Oliver Peckham

AWS Solution Channel

Fire Dynamics Simulation CFD workflow on AWS

Modeling fires is key for many industries, from the design of new buildings, defining evacuation procedures for trains, planes and ships, and even the spread of wildfires. Read more…

Researchers Train Fluid Dynamics Neural Networks on Supercomputers

January 21, 2021

Fluid dynamics simulations are critical for applications ranging from wind turbine design to aircraft optimization. Running these simulations through direct numerical simulations, however, is computationally costly. Many Read more…

By Oliver Peckham

Red Hat’s Disruption of CentOS Unleashes Storm of Dissent

January 22, 2021

Five weeks after angering much of the CentOS Linux developer community by unveiling controversial changes to the no-cost CentOS operating system, Red Hat has un Read more…

By Todd R. Weiss

HiPEAC Keynote: In-Memory Computing Steps Closer to Practical Reality

January 21, 2021

Pursuit of in-memory computing has long been an active area with recent progress showing promise. Just how in-memory computing works, how close it is to practic Read more…

By John Russell

HiPEAC’s Vision for a New Cyber Era, a ‘Continuum of Computing’

January 21, 2021

Earlier this week (Jan. 19), HiPEAC — the European Network on High Performance and Embedded Architecture and Compilation — published the 8th edition of the HiPEAC Vision, detailing an increasingly interconnected computing landscape where complex tasks are carried out across multiple... Read more…

By Tiffany Trader

Saudi Aramco Unveils Dammam 7, Its New Top Ten Supercomputer

January 21, 2021

By revenue, oil and gas giant Saudi Aramco is one of the largest companies in the world, and it has historically employed commensurate amounts of supercomputing Read more…

By Oliver Peckham

President-elect Biden Taps Eric Lander and Deep Team on Science Policy

January 19, 2021

Last Friday U.S. President-elect Joe Biden named The Broad Institute founding director and president Eric Lander as his science advisor and as director of the Office of Science and Technology Policy. Lander, 63, is a mathematician by training and distinguished life sciences... Read more…

By John Russell

Pat Gelsinger Returns to Intel as CEO

January 14, 2021

The Intel board of directors has appointed a new CEO. Intel alum Pat Gelsinger is leaving his post as CEO of VMware to rejoin the company that he parted ways with 11 years ago. Gelsinger will succeed Bob Swan, who will remain CEO until Feb. 15. Gelsinger previously spent 30 years... Read more…

By Tiffany Trader

Julia Update: Adoption Keeps Climbing; Is It a Python Challenger?

January 13, 2021

The rapid adoption of Julia, the open source, high level programing language with roots at MIT, shows no sign of slowing according to data from Julialang.org. I Read more…

By John Russell

Intel ‘Ice Lake’ Server Chips in Production, Set for Volume Ramp This Quarter

January 12, 2021

Intel Corp. used this week’s virtual CES 2021 event to reassert its dominance of the datacenter with the formal roll out of its next-generation server chip, the 10nm Xeon Scalable processor that targets AI and HPC workloads. The third-generation “Ice Lake” family... Read more…

By George Leopold

Esperanto Unveils ML Chip with Nearly 1,100 RISC-V Cores

December 8, 2020

At the RISC-V Summit today, Art Swift, CEO of Esperanto Technologies, announced a new, RISC-V based chip aimed at machine learning and containing nearly 1,100 low-power cores based on the open-source RISC-V architecture. Esperanto Technologies, headquartered in... Read more…

By Oliver Peckham

Julia Update: Adoption Keeps Climbing; Is It a Python Challenger?

January 13, 2021

The rapid adoption of Julia, the open source, high level programing language with roots at MIT, shows no sign of slowing according to data from Julialang.org. I Read more…

By John Russell

Azure Scaled to Record 86,400 Cores for Molecular Dynamics

November 20, 2020

A new record for HPC scaling on the public cloud has been achieved on Microsoft Azure. Led by Dr. Jer-Ming Chia, the cloud provider partnered with the Beckman I Read more…

By Oliver Peckham

NICS Unleashes ‘Kraken’ Supercomputer

April 4, 2008

A Cray XT4 supercomputer, dubbed Kraken, is scheduled to come online in mid-summer at the National Institute for Computational Sciences (NICS). The soon-to-be petascale system, and the resulting NICS organization, are the result of an NSF Track II award of $65 million to the University of Tennessee and its partners to provide next-generation supercomputing for the nation's science community. Read more…

Is the Nvidia A100 GPU Performance Worth a Hardware Upgrade?

October 16, 2020

Over the last decade, accelerators have seen an increasing rate of adoption in high-performance computing (HPC) platforms, and in the June 2020 Top500 list, eig Read more…

By Hartwig Anzt, Ahmad Abdelfattah and Jack Dongarra

Aurora’s Troubles Move Frontier into Pole Exascale Position

October 1, 2020

Intel’s 7nm node delay has raised questions about the status of the Aurora supercomputer that was scheduled to be stood up at Argonne National Laboratory next year. Aurora was in the running to be the United States’ first exascale supercomputer although it was on a contemporaneous timeline with... Read more…

By Tiffany Trader

10nm, 7nm, 5nm…. Should the Chip Nanometer Metric Be Replaced?

June 1, 2020

The biggest cool factor in server chips is the nanometer. AMD beating Intel to a CPU built on a 7nm process node* – with 5nm and 3nm on the way – has been i Read more…

By Doug Black

Programming the Soon-to-Be World’s Fastest Supercomputer, Frontier

January 5, 2021

What’s it like designing an app for the world’s fastest supercomputer, set to come online in the United States in 2021? The University of Delaware’s Sunita Chandrasekaran is leading an elite international team in just that task. Chandrasekaran, assistant professor of computer and information sciences, recently was named... Read more…

By Tracey Bryant

Leading Solution Providers

Contributors

Top500: Fugaku Keeps Crown, Nvidia’s Selene Climbs to #5

November 16, 2020

With the publication of the 56th Top500 list today from SC20's virtual proceedings, Japan's Fugaku supercomputer – now fully deployed – notches another win, Read more…

By Tiffany Trader

Texas A&M Announces Flagship ‘Grace’ Supercomputer

November 9, 2020

Texas A&M University has announced its next flagship system: Grace. The new supercomputer, named for legendary programming pioneer Grace Hopper, is replacing the Ada system (itself named for mathematician Ada Lovelace) as the primary workhorse for Texas A&M’s High Performance Research Computing (HPRC). Read more…

By Oliver Peckham

At Oak Ridge, ‘End of Life’ Sometimes Isn’t

October 31, 2020

Sometimes, the old dog actually does go live on a farm. HPC systems are often cursed with short lifespans, as they are continually supplanted by the latest and Read more…

By Oliver Peckham

Gordon Bell Special Prize Goes to Massive SARS-CoV-2 Simulations

November 19, 2020

2020 has proven a harrowing year – but it has produced remarkable heroes. To that end, this year, the Association for Computing Machinery (ACM) introduced the Read more…

By Oliver Peckham

Nvidia and EuroHPC Team for Four Supercomputers, Including Massive ‘Leonardo’ System

October 15, 2020

The EuroHPC Joint Undertaking (JU) serves as Europe’s concerted supercomputing play, currently comprising 32 member states and billions of euros in funding. I Read more…

By Oliver Peckham

Intel Xe-HP GPU Deployed for Aurora Exascale Development

November 17, 2020

At SC20, Intel announced that it is making its Xe-HP high performance discrete GPUs available to early access developers. Notably, the new chips have been deplo Read more…

By Tiffany Trader

Nvidia-Arm Deal a Boon for RISC-V?

October 26, 2020

The $40 billion blockbuster acquisition deal that will bring chipmaker Arm into the Nvidia corporate family could provide a boost for the competing RISC-V architecture. As regulators in the U.S., China and the European Union begin scrutinizing the impact of the blockbuster deal on semiconductor industry competition and innovation, the deal has at the very least... Read more…

By George Leopold

HPE, AMD and EuroHPC Partner for Pre-Exascale LUMI Supercomputer

October 21, 2020

Not even a week after Nvidia announced that it would be providing hardware for the first four of the eight planned EuroHPC systems, HPE and AMD are announcing a Read more…

By Oliver Peckham

  • arrow
  • Click Here for More Headlines
  • arrow
Do NOT follow this link or you will be banned from the site!
Share This