NEWS BRIEFS
Bristol, ENGLAND — Mentor Graphics Corporation announced that PixelFusion, Ltd., has adopted and successfully deployed a comprehensive set of deep submicron (DSM) Mentor Graphics tools to design and verify the computer industry’s most complex general-purpose chip design to date – the FUZION 150
Faced with the task of verifying an integrated circuit (IC) design that contained 76 million transistors including thousands of simple arithmetic logic units (ALUs), each employing embedded DRAM (eDRAM), PixelFusion turned to Mentor Graphics tools. PixelFusion’s implementation of Mentor Graphics’ DSM solutions marks the leading-edge of what is expected to be a broad-based migration to next-generation design, analysis and verification tools.
The tools are comprised of Mentor Graphics Mach TA for dynamic timing analysis, Calibre for physical verification and design rule checking, and ModelSim for Verilog.
“PixelFusion’s FUZION 150 is representative of the dramatic evolution of DSM chip design to a point where incredible demands are being placed on existing verification tools,” said Jue-Hsien Chern, Vice President and General Manager, Mentor Graphics Deep Submicron Division. “Mentor’s focus on key DSM verification technologies such as high-performance circuit simulation, Verilog simulation and design rule checking, clearly places us at the center of what will become a multi-million dollar market.”
Key to PixelFusion’s ability to design and verify timing lies in the use of Mach TA to perform detailed transistor-level circuit simulation on the FUZION 150 design. Verilog vectors from ModelSim were re-used by Mach TA to verify the timing of DRAM and logic blocks. Mach TA was also used to design and tune several phase lock loops (PLLs).
“It was critical that we achieved SPICE-like accuracy while still meeting our time-to-market demands,” said Russell David, Director of Hardware at PixelFusion. “Mach TA not only delivered on its promises of speed and accuracy, it exceeded our expectations for a high-capacity circuit simulator.”
PixelFusion’s adoption and successful deployment of Mach TA is the latest in a string of recent tool successes, as industry leaders continue to adopt the tool for their IC timing analysis needs. Design teams from multiple industries, including computer, telecommunications, networking and multimedia, have recognized Mach TA’s speed and accuracy, making it the clear choice for dynamic timing analysis now and into the future.
With a single rule file, the Mentor Graphics’ Calibre tool design-style independence technology enabled PixelFusion to ensure DSM rule conformity for the multiple design styles inherent on complex devices such as the FUZION 150. Calibre is the most complete and powerful physical verification and manufacturability solution on the market, delivering best in-class performance and ease of use.
Model Technology’s ModelSim provides ASIC and FPGA designers with the latest in simulation technology regardless of language (VHDL, Verilog or mixed-HDL) or platform (Unix, Windows, Linux). In the case of PixelFusion, ModelSim quickly simulated Verilog vectors that were then used to verify the timing of DRAM and logic blocks. With more than 40,000 licensed units sold worldwide, ModelSim is the industry’s most popular HDL simulator.
PixelFusion’s FUZION 150 is a 0.25 micron, single-chip, massively parallel SIMD (Single Instruction Multiple Data) processor with 24 megabits of on-chip embedded DRAM. This ultra high-performance chip delivers more than 1.5 trillion operations or 3 billion floating-point operations per second, along with 600 gigabytes per second of on-chip memory bandwidth. As a programmable, general-purpose computing device, the FUZION 150 offers maximum performance, features and flexibility to markets ranging from graphics and video to network processing. PixelFusion’s breakthrough FUZION architecture is bringing supercomputer-like performance to today’s high-end computing. For more information visit http://www.pixelfusion.com or http://www.mentor.com
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